5.2
Registers Controlling External Bus Interface
The external bus interface is controlled by the following two registers.
• Memory expansion mode register (MEM)
• Memory expansion wait setting register (MM)
(1) Memory expansion mode register (MEM)
MEM sets the external expansion area.
MEM is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears MEM to 00H.
Figure 5-2. Format of Memory Expansion Mode Register (MEM)
Address: FF47H
After reset: 00H
Symbol
7
MEM
0
MM2
MM1
0
0
1
1
1
Other than above
132
CHAPTER 5 EXTERNAL BUS INTERFACE
R/W
6
5
4
0
0
0
MM0
Single-chip/memory
expansion mode selection P40 to P47 P50 to P53 P54, P55
0
0
Single-chip mode
1
1
Memory
expansion
Note
mode
0
0
0
1
1
1
Setting prohibited
User's Manual U15947EJ2V0UD
3
2
1
0
MM2
MM1
P40 to P47, P50 to P57, P64 to P67 pin state
Port mode
256-byte
AD0 to
Port mode
mode
AD7
*
4 KB
A8 to A11
mode
16 KB
mode
Full-address
mode
0
MM0
P56, P57 P64 to P67
P64 = RD
P65 = WR
P66 = WAIT
Port mode
P67 = ASTB
A12, A13
Port mode
A14, A15