Format Of Pull-Up Resistor Option Register - NEC 78K0 User Manual

(3) Pull-up resistor option registers (PU0, PU1, PU3 to PU7, PU12, and PU14)
These registers specify whether the on-chip pull-up resistors of P00 to P06, P10 to P17, P30 to P33, P40 to P47,
P50 to P57, P64 to P67, P70 to P77, P120, or P140 to P145 are to be used or not. On-chip pull-up resistors can
be used in 1-bit units only for the bits set to input mode of the pins to which the use of an on-chip pull-up resistor
has been specified. On-chip pull-up resistors cannot be connected for bits set to output mode and bits used as
alternate-function output pins, regardless of the settings of PU0, PU1, PU3 to PU7, PU12, and PU14.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears these registers to 00H.
Caution Use of a pull-up resistor can be specified for P60 to P63 pins by a mask option only in the mask
ROM versions.
Symbol 7 6
PU0 0 PU06
7 6
PU1
PU17 PU16
7 6
PU3
0 0
7 6
PU4
PU47 PU46
7 6
PU5
PU57 PU56
7 6
PU6 PU67 PU66
7 6
PU7 PU77 PU76
7 6
PU12
0 0
7 6
PU14
0 0
PUmn
0 On-chip pull-up resistor not connected
1 On-chip pull-up resistor connected
CHAPTER 4 PORT FUNCTIONS
Figure 4-28. Format of Pull-up Resistor Option Register
5 4 3
PU05 PU04 PU03
5 4 3
PU15 PU14 PU13
5 4 3
0 0 PU33
5 4 3
*
PU45 PU44 PU43
5 4 3
PU55 PU54 PU53
5 4 3
PU65 PU64 0
5 4 3
PU75 PU74 PU73
5 4 3
0 0 0
5 4 3
PU145 PU144 PU143
Pmn pin on-chip pull-up resistor selection
(m = 0, 1, 3 to 7, 12, 14; n = 0 to 7)
User's Manual U15947EJ2V0UD
2 1 0
PU02 PU01 PU00
2 1 0
PU12 PU11 PU10
2 1 0
PU32 PU31 PU30
2 1 0
PU42 PU41 PU40
2 1 0
PU52 PU51 PU50
2 1 0
0 0 0
2 1 0
PU72 PU71 PU70
2 1 0
0 0 PU120
2 1 0
PU142 PU141 PU140
Address After reset R/W
FF30H 00H R/W
FF31H 00H R/W
FF33H 00H R/W
FF34H 00H R/W
FF35H 00H R/W
FF36H 00H R/W
FF37H 00H R/W
FF3CH 00H R/W
FF3EH 00H R/W
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