Configuration Of 8-Bit Timer/Event Counters 50 And 51 - NEC 78K0 User Manual

8.2

Configuration of 8-Bit Timer/Event Counters 50 and 51

8-bit timer/event counters 50 and 51 consist of the following hardware.
Table 8-1. Configuration of 8-Bit Timer/Event Counters 50 and 51
Item
Timer register
Register
Timer input
Timer output
Control registers
(1) 8-bit timer counter 5n (TM5n)
TM5n is an 8-bit register that counts the count pulses and is read-only.
The counter is incremented in synchronization with the rising edge of the count clock.
Address: FF16H (TM50), FF1FH (TM51)
Symbol
TM5n
(n = 0, 1)
In the following situations, the count value is cleared to 00H.
<1> RESET input
<2> When TCE5n is cleared
<3> When TM5n and CR5n match in the mode in which clear & start occurs upon a match of the TM5n and
CR5n.
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CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
8-bit timer counter 5n (TM5n)
8-bit timer compare register 5n (CR5n)
TI5n
TO5n
Timer clock selection register 5n (TCL5n)
8-bit timer mode control register 5n (TMC5n)
Port mode register 1 (PM1) or port mode register 3 (PM3)
Port register 1 (P1) or port register 3 (P3)
Figure 8-3. Format of 8-Bit Timer Counter 5n (TM5n)
After reset: 00H
User's Manual U15947EJ2V0UD
Configuration
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