Control Register; Bus Access; Number Of Access Clocks - NEC Renesas V850/SC1 User Manual

6.2.2 Control register

(1) System control register (SYC) (V850/SC1, V850/SC2)
This register switches control signals for the bus interface.
The system control register can be read/written in 8- or 1-bit units.
After reset: 00H R/W
Symbol 7 6
SYC 0 0
BIC
0 DSTB, R/W, LBEN, UBEN
1 RD, WRL, WRH, UBEN
Note The UBEN signal is output regardless of the BIC bit setting in the external expansion mode (set by the
memory expansion mode register (MM)).
Caution In the V850/SC1 and V850/SC2, when using port 9 as an I/O port, set the BIC bit to 0.
Note that the BIC bit is 0 after system reset.

6.3 Bus Access

6.3.1 Number of access clocks

The number of basic clocks necessary for accessing each resource is as follows.
Bus Cycle Type
Instruction fetch
Operand data access
Remarks 1. Unit: Clock/access
2. n: Number of wait insertions
CHAPTER 6 BUS CONTROL FUNCTION
Address: FFFFF064H
5 4
0 0
Bus interface control
Note
signals output
Note
signals output
Table 6-2. Number of Access Clocks
Internal ROM Internal RAM
(32 Bits) (32 Bits)
1
3
User's Manual U15109EJ3V0UD
3 2 1
0 0 0
Peripheral I/O (Bus Width)
Peripheral I/O
(16 Bits)
3 Disabled
1 3
<0>
BIC
External Memory
(16 Bits)
3 + n
3 + n
201