7.3.3 Priorities of maskable interrupts
The V850/SC1, V850/SC2, and V850/SC3 provide a multiple interrupt service in which an interrupt can be
acknowledged while another interrupt is being serviced. Multiple interrupts can be controlled by priority levels.
There are two types of priority level control: control based on the default priority levels, and control based on the
programmable priority levels specified by the interrupt priority level specification bit (xxPRn). When two or more
interrupts having the same priority level specified by xxPRn are generated at the same time, interrupts are serviced in
order depending on the priority level allocated to each interrupt request type (default priority level) beforehand. For
more information, refer to Table 7-1. Programmable priority control divides interrupt requests into eight levels by
setting the priority level specification flag.
Note that when an interrupt request is acknowledged, the ID flag of the PSW is automatically set (1). Therefore,
when multiple interrupts are to be used, clear (0) the ID flag beforehand (for example, by placing the EI instruction
into the interrupt service program) to set the interrupt enable mode.
Remark
xx: Identifying name of each peripheral unit (see Table 7-2)
n:
Peripheral unit number (see Table 7-2)
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CHAPTER 7
INTERRUPT/EXCEPTION PROCESSING FUNCTION
User's Manual U15109EJ3V0UD