NEC Renesas V850/SC1 User Manual page 476

32-bit single-chip microcontrollers
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The following shows the correspondence between the DRAn setting value and the internal RAM area.
(a) V850/SC1 ( µ µ µ µ PD703068Y, 70F3089Y)
V850/SC2 ( µ µ µ µ PD703069Y, 70F3089Y)
V850/SC3 ( µ µ µ µ PD703088Y, 703089Y, 70F3089Y)
Set the DRAn register to a value in the range of 0000H to 0FFFH or 1000H to 3FFFH (n = 0 to 5).
Figure 13-2. Correspondence Between DRAn Setting Value and Internal RAM
Caution Do not set odd addresses for 16-bit transfer (DCHCn register DSn = 1).
Remark
The values in parentheses indicate the DRAn register setting values.
474
CHAPTER 13
xxFFFFFFH
Internal peripheral
I/O area
xxFFF000H
xxFFEFFFH
xxFFE000H
xxFFDFFFH
xxFFC000H
Internal RAM area
xxFFBFFFH
xxFF9000H
xxFF8FFFH
Access-prohibited
area
xxFF8000H
xxFF7FFFH
Expansion ROM area
User's Manual U15109EJ3V0UD
DMA FUNCTIONS
(DRAn setting value)
(0FFFH)
4 KB (usable for DMA)
(0000H)
(3FFFH)
12 KB (usable for DMA)
(1000H)

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