Halt Mode - NEC Renesas V850/SC1 User Manual

4.4.2 HALT mode

(1) Settings and operating states
In this mode, the clock oscillator continues to operate but the CPU operating clock is stopped. A clock continues
to be supplied for other on-chip peripheral functions to maintain the operation of those functions. When HALT
mode is set while the CPU is idle, it enables the system's total power consumption to be reduced.
When in HALT mode, execution of programs is stopped but the contents of all registers and on-chip RAM are
retained as they were just before HALT mode was set. In addition, all on-chip peripheral functions that do not
depend on instruction processing by the CPU continue operating.
HALT mode can be set by executing the HALT instruction. It can be set when the CPU is operating via either the
main clock or subclock.
The operating statuses in the HALT mode are listed in Table 4-1.
(2) Cancellation of HALT mode
HALT mode can be canceled by an NMI request, an unmasked maskable interrupt request, or RESET input.
(a) Cancellation by interrupt request
HALT mode is canceled regardless of the priority level when an NMI request or an unmasked maskable
interrupt request occurs. However, the following occurs if HALT mode was set as part of an interrupt
servicing routine.
(i) When an interrupt request that has a lower priority level than the interrupt currently being serviced
occurs, only HALT mode is canceled and the lower-priority interrupt request is not acknowledged. The
interrupt request itself is retained.
(ii) When an interrupt request (including NMI request) that has a higher priority level than the interrupt
currently being serviced occurs, HALT mode is canceled and the interrupt request is acknowledged.
(b) Cancellation by RESET pin input
This is the same as for normal reset operations.
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CHAPTER 4 CLOCK GENERATION FUNCTION
User's Manual U15109EJ3V0UD