INTC acknowledged
CPU processing
228
CHAPTER 7
INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 7-5. Maskable Interrupt Servicing
INT input
Mask?
PSW. ID = 0
Priority higher than
that of interrupt currently
being serviced?
Priority higher
than that of other interrupt
request?
Highest default
priority of interrupt requests
with the same priority?
Maskable interrupt request
PSW. NP
PSW. ID
EIPC
EIPSW
ECR. EICC
PSW. EP
PSW. ID
PC
Interrupt servicing
User's Manual U15109EJ3V0UD
Yes
No
No
Interrupt enable mode?
Yes
No
Yes
No
Yes
No
Yes
Interrupt request pending
1
0
1
0
Restored PC
Interrupt request pending
PSW
Exception code
0
1
Handler address