NEC Renesas V850/SC1 User Manual page 114

Address Function Register Name
FFFFF1A6H DMA channel control register 2
FFFFF1B0H DMA peripheral I/O address register 3
FFFFF1B2H DMA internal RAM address register 3
FFFFF1B4H DMA byte count register 3
FFFFF1B6H DMA channel control register 3
FFFFF1C0H DMA peripheral I/O address register 4
FFFFF1C2H DMA internal RAM address register 4
FFFFF1C4H DMA byte count register 4
FFFFF1C6H DMA channel control register 4
FFFFF1D0H DMA peripheral I/O address register 5
FFFFF1D2H DMA internal RAM address register 5
FFFFF1D4H DMA byte count register 5
FFFFF1D6H DMA channel control register 5
FFFFF200H 16-bit timer register 0
FFFFF202H 16-bit capture/compare register 00
FFFFF204H 16-bit capture/compare register 01
FFFFF206H Prescaler mode register 00
FFFFF208H 16-bit timer mode control register 0
FFFFF20AH Capture/compare control register 0
FFFFF20CH Timer output control register 0
FFFFF20EH Prescaler mode register 01
FFFFF210H 16-bit timer register 1
FFFFF212H 16-bit capture/compare register 10
FFFFF214H 16-bit capture/compare register 11
FFFFF216H Prescaler mode register 10
FFFFF218H 16-bit timer mode control register 1
FFFFF21AH Capture/compare control register 1
FFFFF21CH Timer output control register 1
FFFFF21EH Prescaler mode register 11
FFFFF230H Asynchronous serial interface mode register 2
FFFFF232H Asynchronous serial interface status register 2
FFFFF234H Baud rate generator control register 2
FFFFF236H Transmit shift register 2
FFFFF238H Receive buffer register 2
FFFFF23AH Baud rate generator mode control register 20
Note In compare mode: R/W
In capture mode: R
112
CHAPTER 3 CPU FUNCTIONS
Symbol
DCHC2
DIOA3
DRA3
DBC3
DCHC3
DIOA4
DRA4
DBC4
DCHC4
DIOA5
DRA5
DBC5
DCHC5
TM0
CR00
CR01
PRM00
TMC0
CRC0
TOC0
PRM01
TM1
CR10
CR11
PRM10
TMC1
CRC1
TOC1
PRM11
ASIM2
ASIS2
BRGC2
TXS2
RXB2
BRGMC
20
User's Manual U15109EJ3V0UD
R/W Bit Units for Manipulation
1 Bit 8 Bits 16 Bits 32 Bits
√ √
R/W
√
√
√
√ √
√
√
√
√ √
√
√
√
√ √
√
R
√
Note
√
√
R/W
√ √
√ √
√ √
√
√
R
√
Note
√
√
R/W
√ √
√ √
√ √
√
√ √
√ √
R
√
R/W
√
W
√
R
√
R/W
(5/10)
After Reset
00H
Undefined
00H
Undefined
00H
Undefined
00H
0000H
00H
0000H
00H
FFH
00H