Chapter 15 Regulator; Outline; Operation - NEC Renesas V850/SC1 User Manual

15.1 Outline

The V850/SC1, V850/SC2, and V850/SC3 incorporate a regulator to realize a 5 V single power supply, low power
consumption, and to reduce noise.
This regulator supplies a voltage obtained by stepping down the V
on-chip logic circuits (excluding the A/D converter and output buffers). The regulator output voltage is set to 3.3 V.
Refer to 2.4 I/O Circuit Types, I/O Buffer Power Supply and Connection of Unused Pins for the power supply
corresponding to each pin.
ADCV -system
DD
input buffer
PORTV -system
DD0
I/O buffer
PORTV
DD0
Remark : Bidirectional level shifter

15.2 Operation

The regulator of the V850/SC1, V850/SC2, and V850/SC3 operates in every mode (STOP, IDLE, HALT).
For stabilization of regulator outputs, connect a capacitor of about 1 µ F (recommended value) to the CPUREG pin.
488
CHAPTER 15
Figure 15-1. Regulator ( µ µ µ µ PD70F3089Y)
V -system I/O buffer
DD1
ADCV
DD
4.0 V to 5.5 V
A/D converter
4.5 V to 5.5 V
Internal digital circuit
(3.3 V)
3.0 V
to
5.5 V
Regulator
V CPUREG
DD0
1 F
User's Manual U15109EJ3V0UD
REGULATOR
power supply voltage to oscillation block and
DD
V
DD1
4.0 V to 5.5 V 3.0 V to 5.5 V
Main/Sub
oscillator
Flash
memory
3.0 V to 5.5 V
V PORTV
PP DD1
µ
(Recommended)
PORTV -system I/O buffer
DD2
PORTV
DD2
PORTV -system I/O buffer
DD1