Application Fields (V850/Sc3); Ordering Information (V850/Sc3) - NEC Renesas V850/SC1 User Manual

Serial interfaces (SIO)
A/D converter
DMA controller
ROM correction
Regulator
Key return function
Clock generator
Power save functions
FCAN controller
Package
CMOS structure

1.4.2 Application fields (V850/SC3)

Car audio equipment

1.4.3 Ordering information (V850/SC3)

Part Number
µ PD703088YGJ-×××-UEN
µ PD703089YGJ-×××-UEN
µ PD70F3089YGJ-UEN
Note
Note Under development
Remarks 1. ××× indicates ROM code suffix.
2. ROMless devices are not provided.
50
CHAPTER 1
Asynchronous serial interface (UART)
3-wire serial I/O (CSI)
2 2
I C bus interface (I C)
8- to 16-bit variable-length serial interface
CSI (8-bit)/UART:
CSI (8- to 16-bit variable)/UART: 1 channel
2
CSI (8-bit)/I C:
CSI (8- or 16-bit):
UART:
Dedicated baud rate generator:
10-bit resolution: 12 channels
Internal RAM ←→ on-chip peripheral I/O: 6 channels
4 correction addresses specifiable
3.5 V to 5.5 V input → internal 3.3 V
4 to 8 pins selectable, falling edge fixed
During main clock or subclock operation
5-level CPU clock (including sub operations)
HALT/IDLE/STOP modes
2 channels ( µ PD703089Y, 70F3089Y)
1 channel ( µ PD703088Y)
144-pin plastic LQFP (20 × 20 mm)
All static circuits
144-pin plastic LQFP (20 × 20)
Note
144-pin plastic LQFP (20 × 20)
Note
144-pin plastic LQFP (20 × 20)
User's Manual U15109EJ3V0UD
INTRODUCTION
1 channel
2 channels
2 channels
2 channels
5 channels
Package Internal ROM
Mask ROM
Mask ROM
Flash memory