NEC Renesas V850/SC1 User Manual page 357

32-bit single-chip microcontrollers
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Figure 11-13. Timing Chart in Single Transfer Mode (1/2)
(a) In transmit/receive mode, data length: 8 bits, transfer direction: MSB first, no interrupt delay,
single transfer mode, operation mode: CKPn bit = 0, DAPn bit = 0
SCKn
(I/O)
SOn
0
(output)
SIn
1
(input)
Reg_R/W
Write 55H to SOTBLn register
SOTBLn
register
SIOLn
register
SIRBLn
register
CSOTn
bit
INTCSIn
interrupt
Remarks 1. n = 5, 6
2. Reg_R/W:
Internal signal. This signal indicates that receive data buffer register (SIRBn/SIRBLn)
read or transmit data buffer register (SOTBn/SOTBLn) write was performed.
CHAPTER 11
SERIAL INTERFACE FUNCTION
1
0
1
0
1
0
55H (transmit data)
ABH
56H
ADH
User's Manual U15109EJ3V0UD
0
1
0
1
0
1
5AH
B5H
6AH
1
(55H)
0
(AAH)
D5H
AAH
AAH
355

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