Function Blocks (V850/Sc1) - NEC Renesas V850/SC1 User Manual

1.2.5 Function blocks (V850/SC1)

(1) Internal block diagram
NMI
INTP0 to INTP9
TI00, TI01,TI10, TI11
TI70, TI71, TI80, TI81
TI90, TI91, TI100, TI101
TI110, TI111, TI120, TI121
TO0, TO1, TO7 to TO12
TI5, TO5, TI6, TO6
SO0
SI0/SDA0
SCK0/SCL0
SO2
SI2/SDA1
SCK2/SCL1
SO3/TXD1
SI3/RXD1
SCK3/ASCK1
SO4/TXD0
SI4/RXD0
SCK4/ASCK0
SO5
SI5
SCK5
SO6
SI6
SCK6
TXD2
RXD2
ASCK2
TXD3
RXD3
ASCK3
KR0 to KR7
Note µ PD703068Y: MODE
µ PD70F3089Y: V
CHAPTER 1
ROM
INTC
512
KB
32-bit barrel
Timer counter
(16-bit timer)
TM0, TM1
RAM
TM7 to TM12
TM5, TM6
General-purpose
24
SIO
KB
2
CSI0/I C0
2
CSI2/I C1
CSI3/UART1
CSI4/UART0
CSI5
CSI6
UART2
UART3
Key return
function
DMAC: 6 ch
Watch timer
Watchdog
timer
(connect to either GND0, GND1, or GND2 in normal operating mode)
PP
User's Manual U15109EJ3V0UD
INTRODUCTION
CPU
ROM Instruction
correction
queue
PC
Multiplier
16 × 16 → 32
shifter
System
BCU
registers
ALU
registers
32 bits × 32
Ports
HLDRQ (P96)
HLDAK (P95)
ASTB (P94)
DSTB/RD (P93)
R/W/WRH (P92)
0UBEN (P91)
LBEN/WRL (P90)
WAIT(P110)
A1 to A15
(P34 to P36, P100 to P107, P110 to 113)
A16 to A21
(P60 to P65)
AD0 to AD15
(P40 to P47, P50 to P57)
CLKOUT
A/D
X1
converter
X2
CG
XT1
XT2
RESET
V V
3.3 V DD0 DD0
Regulator
GND0 GND0
VM45 VM45
V
DD1
PORTV
DD0
PORTV
DD1
PORTV
DD2
PORTGND0
PORTGND1
GND1
GND2
V /MODE
PP
Note
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