NEC Renesas V850/SC1 User Manual page 444

(2) Asynchronous serial interface mode
This mode enables full-duplex operation in which one byte of data after the start bit is transmitted and received.
The on-chip dedicated UARTn baud rate generator enables communications using a wide range of selectable
baud rates.
The UARTn baud rate generator can also be used to generate a MIDI-standard baud rate (31.25 Kbps).
(a) Register settings
The asynchronous serial interface mode settings are made via ASIMn, BRGCn, BRGMCn0, and BRGMCn1
(n = 0 to 3).
Figure 11-44. ASIMn Setting (Asynchronous Serial Interface Mode)
After reset: 00H
<7>
ASIMn TXEn
(n = 0 to 3)
TXEn
0
1
1
PS1n
0
0
1
1
UCLn
0
1
SLn
0
1
ISRMn
0
1
Cautions 1. Do not switch the operating mode until after the current serial transmit/receive
operation has stopped.
2. Receive error interrupts are not provided in the V850/SC1, V850/SC2, and V850/SC3. To
detect receive errors, always set ISRMn to 0.
3. Always set bit 0 to 0.
442
CHAPTER 11 SERIAL INTERFACE FUNCTION
R/W Address: ASIM0: FFFFF300H
<6> 5
RXEn PS1n
RXEn Operating mode
1 UARTn mode (receive only)
0 UARTn mode (transmit only)
1 UARTn mode (transmit and receive)
PS0n
0 No parity
1 Zero parity always added during transmission
No parity detection during reception (parity errors do not occur)
0 Odd parity
1 Even parity
7 bits
8 bits
Stop bit length specification for transmit data
1 bit
2 bits
Receive completion interrupt control when error occurs
Receive completion interrupt is issued when an error occurs
Receive completion interrupt is not issued when an error occurs
User's Manual U15109EJ3V0UD
ASIM1:
ASIM2: FFFFF230H ASIM3:
4 3
PS0n UCLn
RXDn/Pxx pin
function
Serial function
Port function
Serial function
Parity bit specification
Character length specification
FFFFF310H
FFFFF2B0H
2 1 0
SLn ISRMn 0
TXDn/Pxx pin
function
Port function
Serial function
Serial function