NEC Renesas V850/SC1 User Manual page 343

32-bit single-chip microcontrollers
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(b) Communication operations
In 3-wire serial I/O mode, data is transmitted and received in 8 to 16-bit units, specified by setting bits 3 to 0
(BSEL3 to BSEL0) of variable-length serial setting register 4 (CSIB4). Each bit of data is transmitted or
received in synchronization with the serial clock.
After transfer of all bits is completed, SIO4 stops operation automatically and the interrupt request flag
(INTCSI4) is set.
Bits 6 and 5 (CMODE and DMODE) of variable-length serial setting register 4 (CSIB4) can be used to
change the attribute of the serial clock (SCK4) and the phases of serial data (SI4 and SO4).
SCK4 (CMODE = 0)
SCK4 (CMODE = 1)
SIO4 (Write)
SO4 (DMODE = 0)
SO4 (DMODE = 1)
Remark
The arrows show the SI4 data fetch timing.
When CMODE = 0, the serial clock (SCK4) stops at a high level during the operation stop, and outputs a low
level during a data transfer operation. When CMODE = 1, on the other hand, SCK4 stops at a low level
during the operation stop and outputs a high level during a data transfer operation.
The phases of the SO4 output timing and the S14 fetch timing can be shifted half a clock by setting DMODE.
However, the interrupt signal (INTCSI4) is generated at the final edge of the serial clock (SCK4), regardless
of the setting of CSIB4.
CHAPTER 11
SERIAL INTERFACE FUNCTION
Figure 11-10. Timing of 3-Wire Serial I/O Mode
INTCSI4
User's Manual U15109EJ3V0UD
341

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