(When 9-Clock Wait Is Selected for Both Master and Slave) (3/3)
Processing by master device
IICn
IICn
ACKDn
STDn
SPDn
WTIMn
H
ACKEn
H
MSTSn
STTn
SPTn
WRELn
L
INTIICn
TRCn
Transmit
H
Transfer lines
SCLn
SDAn
D7
Processing by slave device
IICn
ACKDn
STDn
SPDn
WTIMn
H
H
ACKEn
MSTSn
L
STTn
L
SPTn
L
WRELn
INTIICn
TRCn
L
Receive
Note To cancel slave wait, write FFH to IICn or set WRELn.
Remark
n = 0, 1
430
CHAPTER 11
SERIAL INTERFACE FUNCTION
Figure 11-40. Example of Master to Slave Communication
(c) Stop condition
←
data
1
2
3
4
5
6
D6
D5
D4
D3
D2
←
IICn
FFH Note
Note
User's Manual U15109EJ3V0UD
7
8
9
D1
D0
Stop
condition
←
IICn
FFH Note
Note
(When SPIEn = 1)
←
IICn
address
(When SPIEn = 1)
1
2
AD6
AD5
Start
condition