16-Bit Timer (Tm0, Tm1, Tm7 To Tm12) Operation; Operation As Interval Timer - NEC Renesas V850/SC1 User Manual

8.2 16-Bit Timer (TM0, TM1, TM7 to TM12) Operation

8.2.1 Operation as interval timer

TMn operates as an interval timer when 16-bit timer mode control register n (TMCn) and capture/compare control
register n (CRCn) are set as shown in Figure 8-2 (n = 0, 1).
In this case, TMn repeatedly generates an interrupt at the time interval specified by the count value preset to 16-
bit capture/compare register n0 (CRn0).
When the count value of TMn matches the set value of CRn0, the value of TMn is cleared to 0, and the timer
continues counting. At the same time, an interrupt request signal (INTTMn0) is generated.
The count clock of the 16-bit timer/event counter can be selected by bits 0 and 1 (PRMn0 and PRMn1) of
prescaler mode register n0 (PRMn0) and by bits 0 (PRMn2) of prescaler mode register n1 (PRMn1).
Remark n = 0, 1, 7 to 12
Figure 8-2. Control Register Settings When TMn Operates as Interval Timer
(a) 16-bit timer mode control registers 0, 1, 7 to 12 (TMC0, TMC1, TMC7 to TMC12)
TMCn 0 0
(b) Capture/compare control registers 0, 1, 7 to 12 (CRC0, CRC1, CRC7 to CRC12)
CRCn 0 0
Remark 0/1: When these bits are reset to 0 or set to 1, other functions can be used along with the interval timer
function. For details, refer to 8.1.4 (1) 16-bit timer mode control registers 0, 1, 7 to 12 (TMC0,
TMC1, TMC7 to TMC12) and (2) Capture/compare control registers 0, 1, 7 to 12 (CRC0,
CRC1, CRC7 to CRC12).
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CHAPTER 8 TIMER/COUNTER FUNCTION
TMCn3
0 0 1
0 0 0
User's Manual U15109EJ3V0UD
TMCn2 TMCn1 OVFn
1 0/1 0
CRCn2 CRCn1 CRCn0
0/1 0/1 0
Clears and starts on
match between TMn
and CRn0.
CRn0 as compare
register