NEC Renesas V850/SC1 User Manual page 712

SCLn (I/O)
<82>
SDAn (I/O)
<81>
Stop Start
condition condition
Remark n = 0, 1
A/D Converter Characteristics (T
Parameter
Resolution
Note 1
Overall error
Conversion time
Note 1
Zero-scale error
Note 1
Full-scale error
Note 2
Integral linearity error
Note 2
Differential linearity error
Analog power supply
voltage
Analog input voltage
ADCV current
DD
Notes 1. Excluding quantization error (±0.05%FSR)
2. Excluding quantization error (±0.5LSB)
Remark LSB: Least Significant Bit
FSR: Full Scale Range
Regulator, Power-on-Clear Circuit, 4.5 V Detection Flag Characteristics (T
µ µ µ µ PD703068Y, 703069Y, 703088Y, 703089Y: V
Parameter
CPUREG output voltage
POC circuit detection voltage
VM45 flag setting voltage
710
CHAPTER 20 ELECTRICAL SPECIFICATIONS
<83> <84>
<89> <88>
<86>
<89>
= –40 to +85°C, V
A DD
Symbol Conditions
–
–
t
CONV
AINL
AINL
INL
DNL
AV
DD
V
IAN
AI
DD
= 3.5 to 5.5 V, µ µ µ µ PD70F3089Y: V
DD
Symbol
1 µ F capacitor connected
V
REG
V CPU operation
POCH
V STOP mode
POCL
VM45
User's Manual U15109EJ3V0UD
<85>
<87>
<82>
Restart
<88>
condition
= ADCV = 4.5 to 5.5 V, GND = ADCGND = 0 V)
DD
MIN.
10
5
4.5
0
= –40 to +85° ° ° ° C,
A
Conditions MIN.
3.0
2.7
1.5
3.7
<91> <90>
Stop
condition
TYP. MAX. Unit
10 10 bit
±1.0
%FSR
µ s
10
±0.4
%FSR
±0.6
%FSR
±6.0
LSB
±6.0
LSB
5.5
ADCV
DD
4 8 mA
= 4.0 to 5.5 V)
DD
TYP. MAX. Unit
3.3 3.6
3.0 3.3
1.8 2.1
4.2 4.5
V
V
V
V
V
V