NEC Renesas V850/SC1 User Manual page 156

(1) Function of P3 pins
Port 3 is an 8-bit I/O port for which I/O settings can be controlled in 1-bit units. I/O settings are controlled via the
port 3 mode register (PM3).
In output mode, the values set to each bit are output to port 3 (P3).
When using this port in input mode, the pin statuses can be read by reading P3. Also, the values of P3 (output
latch) can be read by reading P3 while in output mode.
When using the alternate-function INTP7 to INTP9 pins, noise is eliminated by the analog noise eliminator (the
same as the analog noise eliminator for port 0).
The valid edge for the INTP7 to INTP9 pins is specified by the rising edge specification register 1 (EGP1) and
falling edge specification register 1 (EGN1).
When using the alternate-function A13 to A15 pins, set this port via the memory address output mode register
(MAM).
Clear P3 and the PM3 register to 0 when using alternate-function pins as outputs. The logical sum (ORed result)
of the port output and the alternate-function pin is output from the pins.
When a reset is input, the settings are initialized to input mode. Also, the valid edge of each interrupt request
becomes invalid (INTP7 to INTP9 do not function immediately after reset).
(2) Control registers
(a) Port 3 mode register (PM3)
PM3 can be read/written in 8- or 1-bit units.
After reset: FFH
7
PM3 PM37
PM3n
0
1
154
CHAPTER 5
R/W Address: FFFFF026H
6 5
PM36 PM35
Output mode
Input mode
User's Manual U15109EJ3V0UD
PORT FUNCTIONS
4 3
PM34 PM33 PM32
Control of I/O mode (n = 0 to 7)
2 1 0
PM31 PM30