Interrupt Request Register 0 (Irr0) - Hitachi SH7709S Hardware Manual

6.3.6

Interrupt Request Register 0 (IRR0)

IRR0 is an 8-bit register that indicates interrupt requests from external input pins IRQ0 to IRQ5
and PINT0 to PINT15. This register is initialized to H'00 by a power-on reset or manual reset, but
is not initialized in standby mode.
Bit:
PINT0R PINT1R IRQ5R
Initial value:
R/W:
When clearing an IRQ5R–IRQ0R bit to 0, read the bit while bit set to 1, and then write 0. Only 0
can be written to bits IRQ5R–IRQ0R.
Bit 7—PINT0 to PINT7 Interrupt Request (PINT0R): Indicates whether there is interrupt
request input to pins PINT0 to PINT7.
Bit 7: PINT0R Description
0 No interrupt request to pins PINT0 to PINT7
1 Interrupt to pins PINT0 to PINT7
Bit 6—PINT8 to PINT15 Interrupt Request (PINT1R): Indicates whether there is interrupt
request input to pins PINT8 to PINT15.
Bit 6: PINT1R Description
0 No interrupt request input to pins PINT8 to PINT15
1 Interrupt request input to pins PINT8 to PINT15
Bit 5—IRQ5 Interrupt Request (IRQ5R): Indicates whether there is interrupt request input to
the IRQ5 pin. When edge detection mode is set for IRQ5, an interrupt request is cleared by
clearing the IRQ5R bit.
Bit 5: IRQ5R Description
0 No interrupt request input to IRQ5 pin
1 Interrupt request input to IRQ5 pin
142
7 6 5
0 0 0
R R R/W
4 3 2
IRQ4R IRQ3R IRQ2R
0 0 0
R/W R/W R/W
1 0
IRQ1R IRQ0R
0 0
R/W R/W
(Initial value)
(Initial value)
(Initial value)