Hitachi SH7709S Hardware Manual page 748

Table A.2 Pin Specifications (cont)
Pin Pin No.
(FP-208C,
FP-208E)
CS3/PTK[1]
99
CS2/PTK[0]
98
CS0/MCS0
96
BS/PTK[4]
87
PTJ[5] 113
PTJ[4] 112
CASU/PTJ[3]
110
CASL/PTJ[2]
108
DACK0/PTD[5]
114
DACK1/PTD[7]
115
RD
88
WE0/ DQMLL
89
WE1/DQMLU/WE 90
WE2/DQMUL/
91
ICIORD/PTK[6]
WE3/DQMUU/
92
ICIOWR/PTK[7]
RD/WR 93
AUDSYNC/
94
PTE[7]
PTE[6] 116
PTE[3] 117
RAS3U/PTE[2]
118
PTE[1] 119
TDO/PTE[0] 120
RESETM
124
ADTRG/PTH[5]
125
IOIS16/PTG[7]
126
Pin No. I/O
(BP-240A)
W15 I/O
T16 I/O
T15 O
W12 I/O
R17 I/O
U17 I/O
T17 I/O
R18 I/O
R16 I/O
P19 I/O
T13 O
U13 O
V13 O
W13 I/O
T14 I/O
U14 O
V14 I/O
P18 I/O
P17 I/O
P16 I/O
N19 I/O
N18 I/O
M18 I
M17 I
M16 I
Function
Chip select 3 / I/O port
Chip select 2 / I/O port
Chip select 0 / Mask ROM chip
select 0
Bus cycle start / I/O port
I/O port
I/O port
CAS(SDRAM) / I/O port
CAS(SDRAM) / I/O port
DMA transfer strobe 0 / I/O port
DMA transfer strobe 1 / I/O port
Read strobe pin
D7–D0 select signal/ DQM(SDRAM)
D15–D8 select signal /
DQM(SDRAM)/ PCMCIA
WE signal
D23–D16 select signal /
DQM(SDRAM) / PCMCIA IORD
signal / I/O port
D31–D24 select signal
/DQM(SDRAM) / PCMCIA IOWR
signal / I/O port
Read/write select signal
AUD synchronous I/O port
I/O port
I/O port
RAS(SDRAM) / I/O port
I/O port
Test data output I/O port
Manual reset input
ADC trigger request / Input port
I/O for PC card / input port
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