Hitachi SH7709S Hardware Manual page 724

Superh risc engine
Table of Contents

Advertisement

Tp
CKIO
CKE
t
CSD3
CSn
t
RASD2
RAS3x
CASxx
t
RWD
RD/WR
Figure 23.37 Synchronous DRAM Auto-Refresh Timing (TRAS = 1, TPC = 1)
Tpc
TRr
TRrw
(High)
t
t
t
CSD3
CSD3
CSD3
t
t
t
RASD2
RASD2
RASD2
t
t
CASD2
CASD2
t
RWD
TRrw
(Tpc)
(Tpc)
705

Advertisement

Table of Contents
loading

Table of Contents