Module Standby Function; Transition To Module Standby Function; Clearing Module Standby Function - Hitachi SH7709S Hardware Manual

8.5

Module Standby Function

8.5.1

Transition to Module Standby Function

Setting the standby control register MSTP8–MSTP0 bits to 1 halts the supply of clocks to the
corresponding on-chip peripheral modules. This function can be used to reduce the power
consumption in normal mode and sleep mode. The module standby function holds the state prior
to halting the external pins of the on-chip peripheral modules. TMU external pins hold their state
prior to the halt. SCI external pins go to the reset state. With a few exceptions, all registers hold
their values.
Bit Value Description
MSTP8 0 UBC runs
1 Supply of clock to UBC halted
MSTP7 0 DMAC runs
1 Supply of clock to DMAC halted
MSTP6 0 DAC runs
1 Supply of clock to DAC halted
MSTP5 0 ADC runs
1 Supply of clock to ADC halted, and all registers initialized
MSTP4 0 SCIF runs
1 Supply of clock to SCIF halted
MSTP3 0 IrDA runs
1 Supply of clock to IrDA halted
MSTP2 0 TMU runs
1 Supply of clock to TMU halted. Registers initialized
MSTP1 0 RTC runs
1 Supply of clock to RTC halted. Register access prohibited
MSTP0 0 SCI runs
1 Supply of clock to SCI halted
Notes: *1 The registers initialized are the same as in standby mode (see table 8.4).
*2 The counter runs.
8.5.2

Clearing Module Standby Function

The module standby function can be cleared by clearing the MSTPSLP0 and MSTP8–MSTP0 bits
to 0, or by a power-on reset or manual reset.
*1
*2
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