Hitachi SH7709S Hardware Manual page 369

Start
Initial settings
(SAR, DAR, DMATCR, CHCR, DMAOR)
DE, DME = 1 and
AE, NMIF, TE = 0?
Yes
Transfer request?*
Yes
Transfer (1 transfer unit);
DMATCR – 1 → DMATCR,
SAR and DAR updated
DMATCR = 0?
Yes
DEI interrupt request (when IE = 1)
Does
AE = 1 or
NMIF = 1 or
DE = 0 or DME
= 0?
Yes
Transfer end
Notes: *1
In auto-request mode, transfer begins when AE, NMIF, and TE are both 0 and the DE and
DME bits are set to 1.
DREQ = level detection in burst mode (external request) or cycle-steal mode.
*2
3 DREQ = edge detection in burst mode (external request), or auto-request mode in burst mode.
*
350
No
No
1
No
No
Figure 11.2 DMAC Transfer Flowchart
Bus mode,
transfer request mode,
3
*
DREQ detection selection
system
AE = 1 or
No
NMIF = 1 or
DE = 0 or
DME = 0?
Yes
Transfer aborted
Normal end
2
*