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19.8.2
Port G Data Register (PGDR)
Bit:
PG7DT
Initial value:
R/W:
Note: * Undefined
The port G data register (PGDR) is an 8-bit read-only register that stores data for pins PTG7 to
PTG0. Bits PG7DT to PG0DT correspond to pins PTG7 to PTG0. When the function is general
input port, if the port is read the corresponding pin level is read. Table 19.14 shows the function of
PGDR.
PGDR is initialized by a power-on reset, after which the general input port function (pull-up MOS
on) is set as the initial pin function, and the corresponding pin levels are read.
Table 19.14 Port G Data Register (PGDR) Read/Write Operations
PGnMD1 PGnMD0 Pin State
0
0
Other function
(See table 18.1)
1
Reserved
1
0
Input (Pull-up
MOS on)
1
Input (Pull-up
MOS off)
604
7
6
5
PG6DT PG5DT
*
*
*
R
R
R
Read
H'00
H'00
Pin state
Pin state
4
3
2
PG4DT PG3DT
PG2DT
*
*
*
R
R
R
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
1
0
PG1DT PG0DT
*
*
R
R
(n = 0 to 7)
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