Reset Configuration; H-Udi Reset - Hitachi SH7709S Hardware Manual

22.4.2

Reset Configuration

Table 22.4 Reset Configuration
ASDMD0* 1 RESETP
H L
H
L L
H
Notes: *1 Selects main chip mode or ASE mode
ASEMD0 = H, normal mode
ASEMD0 = L, ASE mode
Set ASEMD0 = H when using on the user system alone, without an emulator and the
H-UDI.
*2 In ASE mode, reset hold is enabled by driving the RESETP and TRST pins low for a
constant cycle. In this state, the CPU does not start up, even if RESETP is driven high.
When TRST is driven high, H-UDI operation is enabled, but the CPU does not start up.
The reset hold state is cancelled by the following:
• Boot request from H-UDI
• Another RESETP assert (power-on reset)
22.4.3

H-UDI Reset

An H-UDI reset is executed by setting an H-UDI reset assert command in SDIR. An H-UDI reset
is of the same kind as a power-on reset. An H-UDI reset is released by inputting an H-UDI reset
negate command.
656
TRST
Chip State
L Normal reset and H-UDI reset
H Normal reset
L H-UDI reset only
H Normal operation
L Reset hold*
H Normal reset
L H-UDI reset only
H Normal operation
2