Addressing Modes - Hitachi SH7709S Hardware Manual

2.3.2

Addressing Modes

Addressing modes and effective address calculation methods are shown in table 2.2.
Table 2.2 Addressing Modes and Effective Addresses
Addressing Instruction
Mode Format
Register direct Rn
Register @Rn
indirect
Register @Rn+
indirect with
post-increment
Register @–Rn
indirect with
pre-decrement
28
Effective Address Calculation Method
Effective address is register Rn. (Operand is
register Rn contents.)
Effective address is register Rn contents.
Rn
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
Rn
Rn + 1/2/4
+
1/2/4
Effective address is register Rn contents,
decremented by a constant beforehand: 1 for
a byte operand, 2 for a word operand, 4 for a
longword operand.
Rn
Rn – 1/2/4
–
1/2/4
Calculation Formula
—
Rn
Rn
Rn
After instruction
execution
Byte: Rn + 1 → Rn
Rn
Word: Rn + 2 → Rn
Longword: Rn + 4 → Rn
Byte: Rn – 1 → Rn
Word: Rn – 2 → Rn
Longword: Rn – 4 → Rn
(Instruction executed
with Rn after
calculation)
Rn – 1/2/4