Mitsubishi Electric Q Series Programming Manual page 64

2 MULTIPLE CPU SYSTEM
Table 2.3 Table of self CPU operation information areas
CPU shared
memory Name
address
0H Information availability
1H Diagnostic error
2H
Time the diagnostic error
3H
occurred
4H
Error information
5H
identification code
6H to 10H Common error information Common error information
Individual error
11H to 1BH
information
1CH Empty
1DH Switch status
1EH Empty
1FH CPU operation status
(a) Self CPU operation information area (0H to 1FFH)
1) The following information of self CPU is stored as the Multiple CPU
system
Detail
The area to confirm if information is stored in the self CPU's
operation information area (1H to 1FH) or not.
Information availability • 0: Information not stored in the self CPU's operation information
flag
• 1: Information stored in the self CPU's operation information
An error No. identified during diagnosis is stored in BIN.
Diagnostic error number
The year and month that the error number was stored in the CPU
shared memory's 1H address is stored with two digits of the BCD
code.
The date and time that the error number was stored in the CPU
Time the diagnostic error
shared memory's 1H address is stored with two digits of the BCD
occurred
code.
The minutes and seconds that the error number was stored in the
CPU shared memory's 1H address is stored with two digits of the
BCD code.
Stores an identification code to determine what error information
Error information
has been stored in the common error information and individual
identification code
error information.
The common information corresponding to the error number
identified during diagnosis is stored.
Individual error The individual information corresponding to the error number
identified during diagnostic is stored.
information
Cannot be used
—
Stores the CPU module switch status.
CPU switch status
Cannot be used
—
Stores the CPU module's operation status.
CPU operation status
2) The self CPU operation information area is refreshed every time the
applicable register has been changed in the main cycle.
3) Other PLC CPU can use FROM instruction to read data from the self
CPU operation information area.
However, because there is a delay in data updating, use the read data
for monitoring purposes only.
(b) System area
The area used by the operating systems (OS) of the PLC CPU/Motion CPU.
(c) User setting area
The area for communication between CPU modules in the Multiple CPU
system by MULTR/MULTW instruction of Motion CPU.
(PLC CPU use FROM/S.TO instruction or Multiple CPU area devices to
communicate between CPU modules.)
Refer to the Programming Manual of operating system software for
MULTR/MULTW instruction.
Description
area.
area.
(Note): Refer to the corresponding special register for details.
2 - 13
(Note)
Corresponding
special register
—
SD0
SD1
SD2
SD3
SD4
SD5 to SD15
SD16 to SD26
—
SD200
—
SD203