Mitsubishi Electric Q Series Programming Manual page 273

APPENDICES
Item
Output device
Watch data
ON section setting
Output enable/disable bit
Forced output bit
(Note-1): "n" in the above device No. indicates the numerical value (axis No.1 to 32 : n= 0 to 31) which correspond to axis No.
(Note-2): "p" indicates the user setting area points of Multiple CPU high speed transmission area in each CPU.
(Note-3): The range of "PXn+4 to PXn+F" cannot be used (fixed at 0) for the input device (PXn+0 to PXn+F) allocated to the
built-in interface in Motion CPU (DI). (n: First input No.)
(Note-4): Setting range varies depending on the setting units.
Table 4.10 Other devices list (Continued)
Q173DSCPU/Q172DSCPU
(Note-3)
X0 to X1FFF
U \G10000.0 to U \G(10000 + p –1).F
U \G10000 to U \G(10000 + p –1)
Constant (Hn/Kn)
U \G10000 to U \G(10000 + p – 1)
(Note-3)
X0 to X1FFF
SM0 to SM1999
U \G10000.0 to U \G(10000 + p – 1).F
POINT
Refer to Chapter 2 for number of user setting area points of Multiple CPU high
speed transmission area.
Q173DCPU(-S1)/Q172DCPU(-S1)
X0 to X1FFF
Y0 to Y1FFF
M0 to M8191
—
B0 to B1FFF
(Note-2)
D0 to D8191
W0 to W1FFF
#0 to #9215
(Note-2)
D0 to D8191
W0 to W1FFF
#0 to #9215
(Note-4)
(Note-2)
X0 to X1FFF
Y0 to Y1FFF
M0 to M8191
—
B0 to B1FFF
F0 to F2047
(Note-2)
APP - 44
Q173HCPU/Q172HCPU
X0 to X1FFF
Y0 to Y1FFF
M0 to M8191
L0 to L8191
B0 to B1FFF
—
D0 to D8191
W0 to W1FFF
#0 to #8191
—
D0 to D8191
W0 to W1FFF
#0 to #8191
(Note-4)
Constant (Hn/Kn)
—
X0 to X1FFF
Y0 to Y1FFF
M0 to M8191
L0 to L8191
B0 to B1FFF
F0 to F2047
M9000 to M9255
—