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Design Flow Steps
This chapter describes customizing and generating the core, constraining the core, and the
simulation, synthesis and implementation steps that are specific to this IP core. More
detailed information about the standard Vivado
can be found in the following Vivado Design Suite user guides:
•
Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
[Ref 8]
•
Vivado Design Suite User Guide: Designing with IP (UG896)
•
Vivado Design Suite User Guide: Getting Started (UG910)
•
Vivado Design Suite User Guide: Logic Simulation (UG900)
Customizing and Generating the Core
This section includes information about using Xilinx
core in the Vivado Design Suite.
If you are customizing and generating the core in the IP integrator, see the Vivado Design
Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
information. IP integrator might auto-compute certain configuration values when
validating or generating the design. To view the parameter value you can run the
validate_bd_design command in the Tcl console.
You can customize the IP for use in your design by specifying values for the various
parameters associated with the core using the following steps:
1. Select the IP from the Vivado IP catalog.
2. Double-click the selected IP or select the Customize IP command from the toolbar or
right-click menu.
For details, see the Vivado Design Suite User Guide: Designing with IP (UG896)
the Vivado Design Suite User Guide: Getting Started (UG910)
Figure in this chapter is an illustration of the CAN FD in the Vivado Integrated Design
Note:
Environment (IDE). This layout might vary from the current version.
CAN FD v2.0
PG223 December 5, 2018
®
design flows and the Vivado IP integrator
®
tools to customize and generate the
www.xilinx.com
Chapter 4
[Ref 6]
[Ref 9]
[Ref 10]
[Ref 8]
for detailed
[Ref 6]
[Ref
9].
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