Xilinx CAN FD v2.0 Product Manual page 22

Table 2-11: Status Register (Cont'd)
Bits Name
4 BIDLE
3 NORMAL
2 SLEEP
1 LBACK
0 CONFIG
Interrupt Status Register (Address Offset + 0x001C)
Interrupt status bits in the ISR can be cleared by writing to the Interrupt Clear register. For
all bits in the ISR, a set condition takes priority over the clear condition and the bit
continues to remain 1.
Table 2-12: Interrupt Status Register
Access Default
Bits Name
31 TXEWMFLL
30 TXEOFLW
CAN FD v2.0
PG223 December 5, 2018
Default
Access
Value
R 0
R 0
R 0
R 0
R 1
Value
TX Event FIFO Watermark Full Interrupt.
• 1 = Indicates that TX Event FIFO is full based on watermark
programming.
R 0
The interrupt continues to assert as long as the TX Event FIFO Fill Level
is above TX Event FIFO Full watermark. This bit can be cleared by
writing to the respective bit in the ICR.
TX Event FIFO Overflow Interrupt.
• 1 = Indicates that a message has been lost. This condition occurs
when the core has successfully transmitted a message for which an
R 0
event store is requested but the TX Event FIFO is full.
This bit can be cleared by writing to the respective bit in the ICR.
This bit is also cleared when a 0 is written to the CEN bit in the SRR.
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Chapter 2: Product Specification
Description
Bus Idle.
Indicates the CAN bus status.
• 1 = Indicates no bus communication is taking place.
• 0 = Indicates the core is either in Configuration mode or
the bus is busy.
Normal Mode.
Indicates that the core is in Normal mode.
• 1 = Indicates that the core is in Normal mode.
• 0 = Indicates that the core is not in Normal mode.
Sleep Mode.
Indicates that the core is in Sleep mode.
• 1 = Indicates that the core is in Sleep mode.
• 0 = Indicates that the core is not in Sleep mode.
Loopback Mode.
Indicates that the core is in Loopback mode.
• 1 = Indicates that the core is in Loopback mode.
• 0 = Indicates that the core is not in Loopback mode.
Configuration Mode Indicator.
Indicates that the core is in Configuration mode.
• 1 = Indicates that the core is in Configuration mode.
• 0 = Indicates that the core is not in Configuration mode.
Description
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