Xilinx CAN FD v2.0 Product Manual page 55

Table 2-40: RB DLC Register (Cont'd)
Bits Name
26 BRS
25 ESI
24:21 Reserved
Matched_Filter
20:16
_Index[4:0]
15:0 Timestamp
RB*-DW0 Register (Address Offset + 0x2108, 0x2150...0x4108, 0x4150...)
Table 2-41: RB DW0 Register
Bits Name
31:24 Data bytes0 [7:0]
23:16 Data bytes1 [7:0]
15:8 Data bytes2 [7:0]
CAN FD v2.0
PG223 December 5, 2018
Control/ Default
Status Value
Bit Rate Switch
The BRS bit provides status whether the bit rate was
switched inside the received CAN FD format frame or not.
• 1 = Bit rate was switched from the standard bit rate of
the ARBITRATION PHASE to the preconfigured alternate
Status N/A
bit rate of the DATA PHASE inside the received CAN FD
frame.
• 0 = Bit rate was not switched inside the received CAN FD
frame.
This bit has no meaning if received frame is CAN frame.
Error State Indicator/
The ESI bit provides the error status of the sender/
transmitter of the message.
Status N/A • 1 = Received frame was sent by error passive transmitter
• 0 = Received frame was sent by error active transmitter
This bit has no meaning if the received frame is a CAN
frame.
N/A N/A Reserved. Read from this field return 0.
This status field is written by the core in RX FIFO mode to
provide the matched filter index for received message.
Status N/A
Note:
this field returns 0.
Timestamp captured after SOF bit. This is written by the
Status N/A
core for status purpose for successfully received message.
Default
Value
Data Byte 0.
N/A
Data byte that was received with CAN or CAN FD frame based on
DLC control field.
Data Byte 1.
N/A
Data byte that was received with CAN or CAN FD frame based on
DLC control field.
Data Byte 2.
N/A
Data byte that was received with CAN or CAN FD frame based on
DLC control field.
www.xilinx.com
Chapter 2: Product Specification
Description
This field is Reserved in RX Mailbox mode and read from
Description
55
Send Feedback