Xilinx CAN FD v2.0 Product Manual page 60

Only AIID[28:18], AISRR, and AIIDE need to be defined for Standard frames. AIID[17:0] and
AIRTR should be written as 0 for Standard frames.
Table 2-43: Acceptance Filter ID Registers
Bits Name
31:21 AIID [28:18]
20 AISRR
19 AIIDE
18:1 AIID[17:0]
0 AIRTR
CAN FD RX Message Space (Mailbox Buffers) Register
Descriptions
Table 2-44: CAN FD RX Message Space (Mailbox Buffers)
Start
Name
Address
0x2100 RB0-ID
0x2104 RB0-DLC
0x2108 RB0-DW0
0x210C RB0-DW1
0x2110 RB0-DW2
0x2114 RB0-DW3
0x2118 RB0-DW4
0x211C RB0-DW5
0x2120 RB0-DW6
0x2124 RB0-DW7
0x2128 RB0-DW8
0x212C RB0-DW9
0x2130 RB0-DW10
0x2134 RB0-DW11
0x2138 RB0-DW12
0x213C RB0-DW13
0x2140 RB0-DW14
0x2144 RB0-DW15
CAN FD v2.0
PG223 December 5, 2018
Access Default
Value
R/W 0 Standard Message ID. Standard Identifier.
Substitute Remote Transmission Request. Indicates the
R/W 0
Remote Transmission Request bit for Standard frames.
Identifier Extension.
R/W 0
Differentiates between Standard and Extended frames.
R/W 0 Extended Message ID. Extended Identifier.
R/W 0 Remote Transmission Request. RTR bit for Extended frames.
Access
Mailbox Buffer Space
Read, Write See RB ID
Read, Write See RB DLC
Read, Write
Read, Write
Read, Write
Read, Write
Read, Write
Read, Write
Read, Write
See RB DW0
Read, Write
RB0 Message space inside
memory mapped RX block
Read, Write
RAM.
Read, Write
Read, Write
Read, Write
Read, Write
Read, Write
Read, Write
Read, Write
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Chapter 2: Product Specification
Description
Description
Register.
Register.
Only required DW locations
for a given message needs to
be read (as per DLC field).
IMPORTANT:
unintended writes are done
Register.
from Host interface to RX
block RAM space (core does
not block writes to RX block
RAM locations).
Notes
Ensure no
60
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