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Xilinx FMC-CE User Manual
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Xilinx FMC-CE User Manual

Xilinx FMC-CE User Manual

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FMC-CE Hardware
User Guide
UG-FMC-CE (v1.1) August 23, 2010

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Summary of Contents for Xilinx FMC-CE

  • Page 1 FMC-CE Hardware User Guide UG-FMC-CE (v1.1) August 23, 2010...
  • Page 2 Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation.

  • Page 3: Table Of Contents

    Table 10. Center PMOD FMC Connection ........................9 Table 11. Rightmost PMD FMC Connections ......................9 Table of Figures Figure 1. FMC-CE Card with Features Annotated .......................1 Figure 2. Slide Switch Schematics ..........................2 Figure 3. Schematic of LEDs for Both the Linear Array and Rosetta Array ..............3 Figure 4.

  • Page 4: About This Guide

    FMC-CE Card Overview The FMC-CE card is meant to be used with a Xilinx demonstration/evaluation board equipped with an FMC connector. This board extends the I/O capabilities of the base platform and provides an I/O consistency among various platforms.

  • Page 5: Table 1. Slide Switch Fmc Connections

    4) Rosetta pattern of 5 LEDs, co-located with the push button switches 5) A Rotary/push-button switch 6) An LCD display (2x16). 7) Headphone jack (7a), speaker jack (7b) with a volume control (7c). 8) 4 SMA connectors 9) 2 Digilent dual PMOD connectors (9a), 1 Digilent single PMOD connector (9b) Detailed Description 1.

  • Page 6: Table 2. Linear Led Connections

    Figure 3. Schematic of LEDs for Both the Linear Array and Rosetta Array Signal Name Voltage Description LED linear 0 Voltage must be sufficient to cross the “on” threshold – need to verify, as this might be changed from “any” to >= some voltage.

  • Page 7: Table 3. Button Fmc Connections

    3. The 5 buttons are pulled to GND through a 10K resistor and pulled up to 2.5 V when pressed. When not pressed the button is pulled up to 2.5V. A series resister (10K Ohms) bleeds off excess voltage if the FPGA is programmed to an IO standard below 2.5V.

  • Page 8: Table 4. Fmc Connections For Leds Adjacent To Push Buttons

    Signal Name Voltage Description LED Rosetta 1 West LED Rosetta 2 North LED Rosetta 3 East LED Rosetta 4 South Table 4. FMC Connections for LEDs Adjacent to Push Buttons 5. Rotary Push-button LED linear labeled ROT-1 Figure 5. Rotary Switch Schematic Signal Name Voltage Description...

  • Page 9: Table 6. Lcd Fmc Connections

    Signal Name Voltage Description LCD Data 3 2.5V As above Four high order bi-directional LCD Data 4 2.5V tristate data bus pins. Used for data transfer and receive between the MPU and the ST7066. LCD Data 5 2.5V As above LCD Data 6 2.5V As above...

  • Page 10: Table 7. Audio Fmc Connections

    PMOD is available on JB. These connectors are intended as connection points for Digilent's expansion boards. The voltage, as always, represents the FPGA’s input and output voltage. There are voltage translators on the FMC-CE card that translate the PMOD’s I/O to 3.3V. Figure 7. PMOD Connector and Schematics...

  • Page 11: Table 9. Leftmost Pmod Fmc Connections

    Leftmost PMOD connector (dual) Signal Name Voltage Description PMOD-JA-1 2.5V PMOD-JA-2 2.5V PMOD-JA-3 2.5V PMOD-JA-4 2.5V PMOD-JA-5 Ground PMOD-JA-6 3.3V Power PMOD-JA-7 2.5V PMOD-JA-8 2.5V PMOD-JA-9 2.5V PMOD-JA-10 2.5V PMOD-JA-11 Ground PMOD-JA-12 3.3V Power Table 9. Leftmost PMOD FMC Connections Center PMOD connector (dual) Signal Name Voltage...

  • Page 12: Table 10. Center Pmod Fmc Connection

    Signal Name Voltage Description PMOD-JB-11 Ground PMOD-JB-12 3.3V Power Table 10. Center PMOD FMC Connection Rightmost PMOD connector (single) Signal Name Voltage Description PMOD-JC-1 2.5V PMOD-JC-2 2.5V PMOD-JC-3 2.5V PMOD-JC-4 2.5V PMOD-JC-5 Ground PMOD-JC-6 3.3V Power Table 11. Rightmost PMD FMC Connections...

  • Page 13: Appendix A: Ucf For Sp605

    Appendix A: UCF for SP605 # User Constraint File for FMC-CE card when attached to a Xilinx SP605 pin locations only! # 2/19/2010 # Device # spartan6 xc6slx45t fgg484 SPEED_GRADE = -2 ?ES silicon boards? # spartan6 xc6slx45t fgg484 SPEED_GRADE = -3 ?production silicon boards?
  • Page 14 # rosetta buttons (5) NET "button_pins<0>" LOC = "A2"; # CONN_BUT0 - center NET "button_pins<1>" LOC = "H13"; # CONN_BUT1 - west NET "button_pins<2>" LOC = "C5"; # CONN_BUT2 - north NET "button_pins<3>" LOC = "B2"; # CONN_BUT3 - east NET "button_pins<4>"...
  • Page 15 NET "AUX_JB<7>" LOC="H10"; NET "AUX_JB<8>" LOC="C4"; NET "AUX_JB<9>" LOC="D4"; NET "AUX_JB<10>" LOC="F14"; NET "AUX_JB<*>" IOSTANDARD = LVCMOS25; # Aux I/O 4 bit 1 x 4 connector JC NET "AUX_JC<1>" LOC="F17"; NET "AUX_JC<2>" LOC="G16"; NET "AUX_JC<3>" LOC="F8"; NET "AUX_JC<4>" LOC="H11"; NET "AUX_JC<*>" IOSTANDARD = LVCMOS25;...

  • Page 16: Appendix B: Ucf For Ml605

    As there are two FMC connectors on the board: J63 and J64, there are two possible connections for each signal, depending on which connector the FMC-CE is plugged in to. When plugged into J63: # User Constraint File for FMC-CE card when attached to a Xilinx ML605 – J63 pin locations only! # 2/26/2010...
  • Page 17 NET "LED_rosetta_pins<2>" LOC = "B33"; # CONN_BUT_LED2 - north NET "LED_rosetta_pins<3>" LOC = "D32"; # CONN_BUT_LED3 - east NET "LED_rosetta_pins<4>" LOC = "K29"; # CONN_BUT_LED4 - south NET "LED_rosetta_pins<*>" IOSTANDARD = LVCMOS25 # CONN_BUT-all # rosetta buttons (5) NET "button_pins<0>" LOC = "H32"; # CONN_BUT0 - center NET "button_pins<1>"...
  • Page 18 NET “DIFSIG_1_n” LOC = “D2”; NET “DIFSIG_2_p” LOC = “G3”; NET “DIFSIG_2_n” LOC = “G4”; When plugged into J64: # User Constraint File for FMC-CE card when attached to a Xilinx ML605 – J64 pin locations only! # 2/26/2010 # Device...
  • Page 19 NET "LCD_data_pins<5>" LOC = "AN29"; NET "LCD_data_pins<6>" LOC = "AP29"; NET "LCD_data_pins<7>" LOC = "AN28"; NET "LCD_data_pins<*>" IOSTANDARD = LVCMOS25 | DRIVE = 4 | SLEW = SLOW; NET "LCD_E_pin" LOC = "AN19" | PULLDOWN | IOSTANDARD = LVCMOS25; NET "LCD_RS_pin" LOC = "AN20" | IOSTANDARD = LVCMOS25; NET "LCD_RW_pin"...
  • Page 20 NET "ROTARY_ENC_A_pin" LOC="AK23" | IOSTANDARD = LVCMOS25; NET "ROTARY_ENC_B_pin" LOC="AM23" | IOSTANDARD = LVCMOS25; NET "ROTARY_ENC_SWITCH_pin" LOC="AL23" | IOSTANDARD = LVCMOS25; # SPI audio dac left NET "AUDIO_DAC_left_MOSI_pin" LOC="AH24" | IOSTANDARD = LVCMOS25; NET "AUDIO_DAC_left_SCK_pin" LOC="AG25" | IOSTANDARD = LVCMOS25; NET "AUDIO_DAC_left_SS_pin"...

  • Page 21: Appendix C: Vita 57.1 Fmc Lpc (J63) And Hpc (J64) Connector Pinout

    Appendix C: VITA 57.1 FMC LPC (J63) and HPC (J64) Connector Pinout NET "FMC_HPC_CLK0_M2C_N" LOC = "K23"; ## H5 on J64 NET "FMC_HPC_CLK0_M2C_P" LOC = "K24"; ## H4 on J64 NET "FMC_HPC_CLK1_M2C_N" LOC = "AP21"; ## G3 on J64 NET "FMC_HPC_CLK1_M2C_P" LOC = "AP20";...
  • Page 22 NET "FMC_HPC_DP7_M2C_N" LOC = "AP6"; ## B13 on J64 NET "FMC_HPC_DP7_M2C_P" LOC = "AP5"; ## B12 on J64 NET "FMC_HPC_GBTCLK0_M2C_N" LOC = "AD5"; ## D5 on J64 NET "FMC_HPC_GBTCLK0_M2C_P" LOC = "AD6"; ## D4 on J64 NET "FMC_HPC_GBTCLK1_M2C_N" LOC = "AK5"; ## B21 on J64 NET "FMC_HPC_GBTCLK1_M2C_P"...
  • Page 23 NET "FMC_HPC_HA19_N" LOC = "U32"; ## F20 on J64 NET "FMC_HPC_HA19_P" LOC = "U33"; ## F19 on J64 NET "FMC_HPC_HA20_N" LOC = "V33"; ## E19 on J64 NET "FMC_HPC_HA20_P" LOC = "V32"; ## E18 on J64 NET "FMC_HPC_HA21_N" LOC = "U30"; ## K20 on J64 NET "FMC_HPC_HA21_P"...
  • Page 24 NET "FMC_HPC_HB17_CC_N" LOC = "AG28"; ## K38 on J64 NET "FMC_HPC_HB17_CC_P" LOC = "AG27"; ## K37 on J64 NET "FMC_HPC_HB18_N" LOC = "AD26"; ## J37 on J64 NET "FMC_HPC_HB18_P" LOC = "AD25"; ## J36 on J64 NET "FMC_HPC_HB19_N" LOC = "AK31"; ## E34 on J64 NET "FMC_HPC_HB19_P"...
  • Page 25 NET "FMC_HPC_LA19_N" LOC = "AN24"; ## H23 on J64 NET "FMC_HPC_LA19_P" LOC = "AN25"; ## H22 on J64 NET "FMC_HPC_LA20_N" LOC = "AL24"; ## G22 on J64 NET "FMC_HPC_LA20_P" LOC = "AK23"; ## G21 on J64 NET "FMC_HPC_LA21_N" LOC = "AP29"; ## H26 on J64 NET "FMC_HPC_LA21_P"...
  • Page 26 NET "FMC_LPC_IIC_SCL_LS" LOC = "AF13"; ## 2 of Q26 NET "FMC_LPC_IIC_SDA_LS" LOC = "AG13"; ## 2 of Q27 NET "FMC_LPC_LA00_CC_N" LOC = "K27"; ## G7 on J63 NET "FMC_LPC_LA00_CC_P" LOC = "K26"; ## G6 on J63 NET "FMC_LPC_LA01_CC_N" LOC = "E31"; ## D9 on J63 NET "FMC_LPC_LA01_CC_P"...
  • Page 27 NET "FMC_LPC_LA21_N" LOC = "T26"; ## H26 on J63 NET "FMC_LPC_LA21_P" LOC = "R26"; ## H25 on J63 NET "FMC_LPC_LA22_N" LOC = "P27"; ## G25 on J63 NET "FMC_LPC_LA22_P" LOC = "N27"; ## G24 on J63 NET "FMC_LPC_LA23_N" LOC = "R27"; ## D24 on J63 NET "FMC_LPC_LA23_P"...