Xilinx CAN FD v2.0 Product Manual page 35

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RX Buffer Control Status Register 0 (Address Offset + 0x00B0) (0 to 15 RX
Mailbox Buffers)
Table 2-24: RX Buffer Control Status Register 0
Bits
Name
Access
31
CSB15
:
:
18
CSB2
17
CSB1
Write 1
to Clear
16
CSB0
15
HCB15
:
:
2
HCB2
1
HCB1
R/W
0
HCB0
Notes:
1. This register space is reserved for RX sequential/FIFO buffer mode. Write has no effect and read returns 0.
RX Buffer Control Status Register 1 (Address Offset + 0x00B4) (16 to 31 RX
Mailbox Buffers)
Description similar to
This register space is reserved for RX Sequential/FIFO mode or when number of RX mailbox
Note:
buffers are 16. When reserved, write has no effect and read returns 0.
CAN FD v2.0
PG223 December 5, 2018
Default
Description
Value
Core Status bit for RX Buffer0
1 = Indicates buffer is full,
that is the core has received
message in this buffer
0 = buffer is not full
0
Host clears this bit by writing
1.
This description is valid for
CSB0.
For CSB1 to CSB15,
description similar to CSB0.
Host Control bit for RX
Buffer0
1 = Indicates buffer is active,
that is ID Field of RB0 buffer
and corresponding Mask
register are programmed by
Host and this buffer can
receive message.
0
0 = buffer is inactive
Host might change this bit
anytime.
This description is valid for
HCB0.
For HCB1 to HCB15,
description similar to HCB0.
Table 2-24, page
35.
www.xilinx.com
Chapter 2: Product Specification
Combined Meaning of CSBx:HCBx
CSBx:HCBx = "00" ->
Buffer is inactive (it is not considered in ID
match process).
CSBx:HCBx = "01" ->
Buffer is active (it can receive message if
receive ID matches with buffer ID).
CSBx:HCBx = "11" ->
Buffer is full (it has received message)
CSBx:HCBx = "10" ->
Buffer is invalid. This condition can happen
when core updates CS0 bit to indicate
Buffer is full and at the same time Host tries
to make Buffer Inactive.
When changing status of a Buffer from
Note:
active to inactive, Host should verify the update
by read back (to check if buffer status has
changed to Invalid due to core indicating buffer
full at the same time).
Full(11) -> Active(01) or Inactive(00) can
Note:
or cannot be taken into account in current match
process if running.
Inactive(00) -> Active(01) can or cannot
Note:
be taken into account in current match process if
running.
Invalid buffers do not participate in ID
Note:
match process.
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