Xilinx CAN FD v2.0 Product Manual page 14

Table 2-4: CAN FD Core Register Space (Cont'd)
Start
Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0x0094
0x0098
0x009C
0x00A0
RSVD
0x00A4
RSVD
0x00A8
RSVD
0x00AC RSVD
0x00B0
0x00B4
0x00B8
0x00BC
RSVD
0x00C0
0x00C4
RSVD
0x00C8
RSVD
0x00CC
RSVD
0x00D0 RSVD
0x00D4
RSVD
0x00D8 RSVD
0x00DC
RSVD
0x00E0
0x00E4
RSVD
(1)
0x00E8
FL_1[6:0]
0x00EC
RSVD
0x00F0
RSVD
0x00F4
RSVD
CAN FD v2.0
PG223 December 5, 2018
TXE_FL[5:0]
(1)
RI_1[5:0] FL[6:0]
RXFP[4:0] RXFWM_1[5:0]
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Chapter 2: Product Specification
8 7 6 5 4 3 2 1 0
TXE_RI[4:0]
TXE_FWM[4:0]
RI[5:0]
RXFWM[5:0]
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Name
(Reset
Value)
IETRS
(0x0)
TCR (0x0)
IETCS
(0x0)
TxE_FSR
(0x0)
TxE_WMR
(0xF)
Reserved
Reserved
RCS0
(0x0)
RCS1
(0x0)
RCS2
(0x0)
Reserved
IERBF
(0x0)
IERBF
(0x0)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
AFR (0x0)
Reserved
FSR (0x0)
WMR
(0xF)
Reserved
Reserved
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