Free Function Blocks; Overview; Runtime Groups And Run Sequence - Siemens SINAMICS G120 Operating Instructions Manual

Advanced commissioning

6.14 Free function blocks

6.14 Free function blocks
6.14.1

Overview

The free function blocks permit configurable signal processing in the inverter.
The following free function blocks are available:
● AND, OR, XOR, and NOT logic
● RSR (RS flip-flop), DSR (D flip-flop) flip-flops
● Timers MFP (pulse generator), PCL (pulse shortening), PDE (ON delay), PDF (OFF delay),
and PST (pulse stretching)
● ADD (adder), SUB (subtractor), MUL (multiplier), DIV (divider), AVA (absolute value
generated), NCM (comparator), and PLI (polyline) arithmetic functions
● LIM (limiter), PT1 (smoothing), INT (integrator), DIF (differentiator) controllers
● NSW (analog) BSW (binary) switches
● LVM limit value monitoring
The number of free function blocks in the inverter is limited. You can only use a function block
once. The inverter has 3 adders, for instance. If you have already configured three adders,
then no other adders are available.
6.14.2

Runtime groups and run sequence

In order to activate a free function block, you must assign it to a runtime group.
There are 6 runtime groups, which the inverter calculates with different time slices.
Table 6-31
Runtime group
Time slice
AND, OR, XOR, NOT, RSR, DSR, BSW
ADD, SUB, MUL, DIV, AVA, NCM, PLI,
MFP, PCL, PDE, PDF, PST, NSW, LIM,
PT1, INT, DIF, LVM
✓: You can assign the free function blocks to this runtime group
-: A free function block is not possible in this runtime group
You can define a run sequence (0 ... 32000) within a runtime group. The inverter calculates
the function blocks in an ascending run sequence.
224
Permissible runtime groups of the free function blocks
1 2
8 ms 16 ms 32 ms
✓ ✓
- -
Converter with the CU250S-2 Control Units
Operating Instructions, 04/2018, FW V4.7 SP10, A5E31759476B AG
3 4 5
64 ms 128 ms
✓ ✓ ✓
- - ✓
6
256 ms
✓
✓