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Part IV. Communications Processor Module
¥ Four full-duplex serial communications controllers (SCCs) support the following
protocols:
Ñ IEEE802.3/Ethernet
Ñ High level/synchronous data link control (HDLC/SDLC)
Ñ LocalTalk (HDLC-based local area network protocol)
Ñ Universal asynchronous receiver transmitter (UART)
Ñ Synchronous UART (1x clock mode)
Ñ Binary synchronous communication (BISYNC)
Ñ Totally transparent operation
¥ Two full-duplex serial management controllers (SMCs) support the following
protocols:
Ñ GCI (ISDN interface) monitor and C/I channels
Ñ UART
Ñ Transparent operation
¥ Serial peripheral interface (SPI) support for master or slave
2
¥ I
C bus controller
¥ Time-slot assigner supports multiplexing of data from any of the SCCs, FCCs,
SMCs, and MCCs onto eight time-division multiplexed (TDM) interfaces. The time-
slot assigner supports the following TDM formats:
Ñ T1/CEPT lines
Ñ T3/E3
Ñ Pulse code modulation (PCM) highway interface
Ñ ISDN primary rate
Ñ Motorola interchip digital link (IDL)
Ñ General circuit interface (GCI)
Ñ User-deÞned interfaces
¥ Eight independent baud rate generators (BRGs)
¥ Four general-purpose 16-bit timers or two 32-bit timers
¥ General-purpose parallel portsÑsixteen parallel I/O lines with interrupt capability
Figure 13-1 shows the MPC8260Õs CPM block diagram.
13-2
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
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