Smc Mode Registers (Smcmr1/Smcmr) - Motorola MPC8260 PowerQUICC II User Manual

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¥ Local loopback and echo capability for testing
26.2 Common SMC Settings and ConÞgurations
The following sections describe settings and conÞgurations that are common to the SMCs.
26.2.1 SMC Mode Registers (SMCMR1/SMCMR2)
The SMC mode registers (SMCMR1 and SMCMR2), shown in Figure 26-2, selects the
SMC mode as well as mode-speciÞc parameters. The functions of SMCMR[8Ð15] are the
same for each protocol. Bits 0Ð7 vary according to protocol selected by the SM bits.
Bit 0 1
Field: UART Ñ
Transparent
GCI
Reset
R/W
Address
Figure 26-2. SMC Mode Registers (SMCMR1/SMCMR2)
MOTOROLA
2 3 4 5 6
CLEN SL PEN
Ñ BS
ME Ñ
0000_0000_0000_0000
0x11A82 (SMCMR1), 0x11A92 (SMCMR2)
Chapter 26. Serial Management Controllers (SMCs)
Part IV. Communications Processor Module
7 8 9 10
PM Ñ SM
REVD
C#
R/W
11 12 13 14 15
DM TEN REN
26-3