Motorola MPC8260 PowerQUICC II User Manual page 124

Part I. Overview
Internal
Abbreviation
Address
10200Ð10 21F Reserved
10220 TMCNTSC
10224 TMCNT
10228 Reserved
1022C TMCNTAL
10230Ð1023F Reserved
10240 PISCR
10244 PITC
10248 PITR
1024CÐ102A8 Reserved
102AAÐ10BFF Reserved
10C00 SICR
10C04 SIVEC
10C08 SIPNR_H
10C0C SIPNR_L
10C10 SIPRR
10C14 SCPRR_H
10C18 SCPRR_L
10C1C SIMR_H
10C20 SIMR_L
10C24 SIEXR
10C28Ð10C7F Reserved
10C80 SCCR
10C88 SCMR
10C90 RSR
10C94 RMR
10C98Ð10CFF Reserved
3-4
Table 3-1. Internal Memory Map (Continued)
Name
System Integration Timers
Ñ
Time counter status and control
register
Time counter register
Ñ
Time counter alarm register
Ñ
Periodic interrupt status and control
register
Periodic interrupt count register
Periodic interrupt timer register
Ñ
Ñ
Interrupt Controller
SIU interrupt conÞguration register
SIU interrupt vector register
SIU interrupt pending register (high)
SIU interrupt pending register (low)
SIU interrupt priority register
CPM interrupt priority register (high)
CPM interrupt priority register (low)
SIU interrupt mask register (high)
SIU interrupt mask register (low)
SIU external interrupt control register
Clocks and Reset
System clock control register
System clock mode register
Reset status register
Reset mode register
Ñ
MPC8260 PowerQUICC II UserÕs Manual
Size Section/Page Number
32 bytes
16 bits 4.3.2.14/4-40
32 bits 4.3.2.15/4-41
32 bits Ñ
32 bits 4.3.2.16/4-41
16 bytes Ñ
16 bits 4.3.3.1/4-42
32 bits 4.3.3.2/4-43
32 bits 4.3.3.3/4-44
94 bytes Ñ
2,390bytes Ñ
16 bits 4.3.1.1/4-17
32 bits 4.3.1.6/4-23
32 bits 4.3.1.4/4-21
32 bits 4.3.1.4/4-21
32 bits 4.3.1.2/4-18
32 bits 4.3.1.3/4-19
32 bits 4.3.1.3/4-19
32 bits 4.3.1.5/4-22
32 bits 4.3.1.5/4-22
32 bits 4.3.1.7/4-24
32 bits 9.8/9-8
32 bits 9.9/9-9
32 bits 5.2/5-4
32 bits 5.3/5-5
104 bytes Ñ
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