Motorola MPC8260 PowerQUICC II User Manual page 132

Part I. Overview
Internal
Abbreviation
Address
11A77 SCCS4
11A78Ð11A7F Reserved
11A82 SMCMR1
11A86 SMCE1
11A8A SMCM1
11A8BÐ11A 91 Reserved
11A92 SMCMR2
11A96 SMCE2
11A9A SMCM2
11A9BÐ11A9F Reserved
11AA0 SPMODE
11AA2 Reserved
11AA6 SPIE
11AA7 Reserved
11AAA SPIM
11AAB Reserved
11AAD SPCOM
11AA7Ð11AFF Reserved
11B00 CMXSI1CR
11B02 CMXSI2CR
11B03 Reserved
11B04 CMXFCR
11B08 CMXSCR
11B0C CMXSMR
11B0D Reserved
3-12
Table 3-1. Internal Memory Map (Continued)
Name
SCC4 status register
Ñ
SMC1 mode register
SMC1 event register
SMC1 mask register
Ñ
SMC2 mode register
SMC2 event register
SMC2 mask register
Ñ
SPI mode register
Ñ
SPI event register
Ñ
SPI mask register
Ñ
SPI command register
Ñ
CPM Mux
CPM mux SI1 clock route register
CPM mux SI2 clock route register
Ñ
CPM mux FCC clock route register
CPM mux SCC clock route register
CPM mux SMC clock route register
Ñ
MPC8260 PowerQUICC II UserÕs Manual
Size
8 bits
8 bytes
SMC1
16 bits
8 bits
8 bits
7 bytes
SMC2
16 bits
8 bits
8 bits
5 bytes
SPI
16 bits
4 bytes
8 bits
24 bits
8 bits
24 bits
8 bits
89 bytes
8 bits
8 bits
8 bits
32 bits
32 bits
8 bits
8 bits
Section/Page Number
20.20/20-21 (UART)
21.12/21-14 (HDLC)
22.15/22-16 (BISYNC)
23.13/23-13 (Transparent)
Ñ
26.2.1/26-3
26.3.11/26-18 (UART)
26.4.10/26-28 (Transparent)
26.5.9/26-34 (GCI)
Ñ
26.2.1/26-3
26.3.11/26-18 (UART)
26.4.10/26-28 (Transparent)
26.5.9/26-34 (GCI)
Ñ
33.4.1/33-6
Ñ
33.4.2/33-9
Ñ
33.4.2/33-9
Ñ
33.4.3/33-9
Ñ
15.4.2/15-10
15.4.3/15-11
Ñ
15.4.4/15-12
15.4.5/15-14
15.4.6/15-17
Ñ
MOTOROLA