Motorola MPC8260 PowerQUICC II User Manual page 981

Motorola processor users manual
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Numerics
603e features list, 2-3
60x bus
60x-compatible mode
60x-compatible bus mode, 8-3
address latch enable (ALE), 10-11
BUFCMD, 10-42
EAMUX signal, 10-41
MAR, 10-77
overview, 10-101
size calculation, 8-19
60x-to-local bus transaction priority, 10-8
address
arbitration, 8-7
ARTRY, 8-23
operations, 8-7
pipelining, 8-9
timing configuration, 8-25
transfer attribute signals, 8-10
transfer termination, 8-23
bandwidth control on the IDMA channel, 18-12
bus protocol
address pipelining, 8-7
arbitration phase, 8-5
overview, 8-4
split-bus transactions, 8-7
configuration, 8-2
data
asserting TEA, 8-30
data bus arbitration, 8-26
data bus transfers, 8-27
data streaming mode, 8-27
effect of ARTRY assertion, 8-28
normal termination, 8-27
operations, 8-26
port size data bus transfers and PSDVAL
termination, 8-28
data transfers
alignment, 8-14
burst ordering, 8-14
port size, 8-16
extended transfer mode, 8-20
extended write cycle data bus contents, 8-21
little-endian mode, 8-33
LSDMR register, 10-24
lwarx/stwcx. support, 8-33
MEI protocol, 8-31
memory coherency, 8-31
MOTOROLA
INDEX
no-pipeline mode, 8-26
one-level pipeline mode, 8-26
overview, 8-1
pipeline control, 8-26
port size device interfaces, 8-17
processor state signals, 8-32
PSDMR register, 10-21
single-MPC8260 bus mode, 8-2
TBST signal, 8-13
TCn signals, 8-13
terminology, 8-1
TESCRx registers, 10-33
TLBISYNC input, 8-33
TSIZn signals, 8-13
TTn signals, 8-10
write cycle data bus contents, 8-19
60x bus memory controller, see Memory controller
A
Accessing dual-port RAM, 13-15
Acronyms and abbreviated terms, list, lxi, I-lxviii,
II-ii, III-iii, IV-iv
AppleTalk mode
GSMR, 25-3
programming example, 25-3
PSMR, 25-4
TODR, 25-4
ATM controller
AAL1 sequence number protection table, 29-78
AALn RxBD, 29-6, 29-69
AALn TxBD, 29-5, 29-74
ABR flow control, 29-8, 29-20
address compression, 29-15
ATM layer statistics, 29-33
ATM memory structure, 29-37
ATM pace control (APC) unit
ATM service types, 29-8
configuration, 29-93
data structures, 29-61
modes, 29-8
overview, 29-8
parameter tables, 29-62
priority table, 29-63
scheduling mechanism, 29-9
scheduling tables, 29-63
traffic type, 29-11
UBR+ traffic, 29-13
Index
Index-1

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