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28.3 FCC Protocol-SpeciÞc Mode Registers
(FPSMRx)
The functionality of the FCC varies according to the protocol selected by GFMR[MODE].
Each FCC has an additional 32-bit, memory-mapped, read/write protocol-speciÞc mode
register (FPSMR) that conÞgures them speciÞcally for a chosen mode. The section for each
speciÞc protocol describes the FPSMR bits.
28.4 FCC Data Synchronization Registers (FDSRx)
Each FCC has a 16-bit, memory-mapped, read/write data synchronization register (FDSR)
that speciÞes the pattern used in the frame synchronization procedure of the synchronous
protocols. In the totally transparent protocol, the FDSR should be programmed with the
preferred SYNC pattern. For Ethernet protocol, it should be programmed with 0xD555. At
reset, it defaults to 0x7E7E (two HDLC ßags), so it does not need to be written for HDLC
mode. The FDSR contents are always sent lsb Þrst.
Bits
0
1
2
Field
Reset
0
1
1
R/W
Address
Table 28-2. FCC Data Synchronization Register (FDSR)
28.5 FCC Transmit-on-Demand Registers (FTODRx)
If no frame is being sent by the FCC, the CP periodically polls the R bit of the next TxBD
to see if the user has requested a new frame/buffer to be sent. The polling algorithm depends
on the FCC conÞguration, but occurs every 256 serial transmit clocks. The user, however,
can request that the CP begin processing the new frame/buffer without waiting the normal
polling time. For immediate processing, set the transmit-on-demand (TOD) bit in the
transmit-on-demand register (TODR) after setting TxBD[R].
This feature, which decreases the transmission latency of the transmit buffer/frame, is
particularly useful in LAN-type protocols where maximum interframe GAP times are
limited by the protocol speciÞcation. Since the transmit-on-demand feature gives a high
priority to the speciÞed TxBD, it can conceivably affect the servicing of the other FCC
FIFO buffers. Therefore, it is recommended that the transmit-on-demand feature be used
only for a high-priority TxBD and when transmission on this FCC has not occurred for a
given time period, which is protocol-dependent.
If a new TxBD is added to the BD table while preceding TxBDs have not completed
transmission, the new TxBD is processed immediately after the older TxBDs are sent.
MOTOROLA
Chapter 28. Fast Communications Controllers (FCCs)
3
4
5
6
SYN2
1
1
1
1
0x1130C (FDSR1), 0x1132C (FDSR2), 0x1132C (FDSR3)
Part IV. Communications Processor Module
7
8
9
10
11
0
0
1
1
R/W
12
13
14
15
SYN1
1
1
1
1
28-7
0
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