Apc Parameter Tables - Motorola MPC8260 PowerQUICC II User Manual

Part IV. Communications Processor Module

APC Parameter Tables

Parameter Table
PHY #0
Parameter Table
PHY #1
Parameter Table
PHY #31
Note: The shaded areas represent the active structures for an example implementation of PHY #0
with two priorities. (The unshaded areas and dashed arrows represent unused structures.)
Figure 29-38. ATM Pace Control Data Structure
29.10.4.1 APC Parameter Tables
Each PHYÕs APC parameter table, shown in Table 29-29, holds parameters that deÞne the
priority table location, the number of priority levels, and other APC parameters. The table
resides in the dual-port RAM. The parameter APCP_BASE, described in Section 29.10.1,
ÒParameter RAM,Ó points to the base address of PHY#0Õs parameter table.
For multiple PHYs, the table structure is duplicated. Each table resides in 32 bytes of
memory. The starting address of each APC parameter table is given by APCP_BASE +
PHY# ´ 32. Note however that in slave mode with multiple PHYs, the parameter table
always resides at APCP_BASE regardless of the PHY address.
1
Offset Name
0x00 APCL_FIRST
0x02 APCL_LAST
0x04 APCL_PTR
0x06 CPS
0x07 CPS_CNT
0x08 MAX_ITERATIO
N
0x09 CPS_ABR
29-62
APC Priority Table
Priority 1
Priority 2
Priority 3
Priority 4
Priority 5
Priority 6
Priority 7
Priority 8
Table 29-29. APC Parameter Table
Width
Hword Address of Þrst entry in the priority table. Must be 8-byte aligned. User-initialized.
Hword Address of last entry in the priority table. Must be 8-byte aligned. User-initialized
as APCL_FIRST + 8 x (number_of_priorities - 1).
Hword Address of current priority entry used by the CP. User-initialized with
APCL_FIRST.
Byte Cells per slot. Determines the number of cells sent per APC slot. See
Section 29.3.2, ÒAPC Unit Scheduling Mechanism.Ó User-deÞned. (0x01 = 1 cell;
0xFF = 255 cells.) Note that if ABR is used, CPS must be a power of two.
Byte Cells sent per APC slot counter. User-initialized to CPS; used by the CP.
Byte Max iteration allowed. Number of scan iterations allowed in the APC. User-
deÞned. This parameter limits the time spent in a single APC routine, thereby
avoiding excessive APC latency.
Byte ABR only. Cells per slot represented as a power of two. User-deÞned. (For
example, if CPS is 1, CPS_ABR = 0x00; if CPS is 8, CPS_ABR = 0x03.)
MPC8260 PowerQUICC II UserÕs Manual
APC Scheduling Tables
Priority 1 Scheduling Table
Priority 2 Scheduling Table
Priority 3 Scheduling Table
Priority 4 Scheduling Table
Priority 5 Scheduling Table
Priority 6 Scheduling Table
Priority 7 Scheduling Table
Priority 8 Scheduling Table
Description
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