Bar0/Bar2/Bar1/Bar3 Registers (Sata I/O Register For Ide Mode); Bar4 Registers (Sata I/O Register For Ide Mode) - AMD SB600 Technical Reference Manual

2.1.2

BAR0/BAR2/BAR1/BAR3 Registers (SATA I/O Register for IDE mode)

BAR0/BAR2 uses 8 bytes of I/O space. BAR0 is used for Primary channel and BAR2 is used for Secondary
channel during IDE native mode. BAR1/BAR3 uses 2 bytes of I/O space. BAR1 is used for Primary channel
and BAR3 is used for Secondary channel during IDE native mode.
Address (hex)
Compatibility Mode
IDE Command Block Registers
Primary Secondary
1F0 170
1F1 171
1F2 172
1F3 173
1F4 174
1F5 175
1F6 176
1F7 177
IDE Control Block Registers
Primary Secondary
3F6 376
2.1.3

BAR4 Registers (SATA I/O Register for IDE mode)

BAR4 uses 16 bytes of I/O space. The Bus-master interface base address register (BAR4) defines the base
address of the IO spare.
Bus-master IDE Command - RW- 8 bits - [IO_Reg: BAR4 + 00/08h]
Field Name
Bus Master IDE
Start/Stop
Reserved
Bus Master Read/Write
Reserved
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Native Mode (Offset)
BAR0/BAR2
(Primary or Secondary)
Base Address 0 + 0
(Primary or Secondary)
Base Address 0 + 1
(Primary or Secondary)
Base Address 0 + 2
(Primary or Secondary)
Base Address + 3
(Primary or Secondary)
Base Address + 4
(Primary or Secondary)
Base Address + 5
(Primary or Secondary)
Base Address + 6
(Primary or Secondary)
Base Address + 7
BAR1/BAR3
(Primary or Secondary)
Base Address + 2
Register Name
Bus-master IDE Command
Bus-master IDE Status
Descriptor Table Pointer
Bits Default
0 0b Bus Master IDE Start (1)/Stop (0).
This bit will not be reset by interrupt from IDE device. This must
be reset by soft ware (device driver).
2:1 Reserved.
3 0b Bus Master IDE r/w (direction) control
0 = Memory -> IDE
1 = IDE -> Memory
This bit should not change during Bus Master transfer cycle, even
if terminated by Bus Master IDE stop.
7:4 Reserved.
Name and Function
Read Function
Data (16 bit)
Error register
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive/Head
Status
Alternate Status
Description
SATA Registers (Device 18, Function 0)
Proprietary
Write Function
Data (16 bit)
Features register
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive/Head
Command
Device Control
Offset Address
[Primary/Secondary]
00h/08h
02h/0Ah
04h/0Ch
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