AMD SB600 Technical Reference Manual page 8

Register Information
Register name
Read / Write capability
R = Readable
W = Writable
RW = Readable and Writable
Register size
Register address(es)*
Field name
Field position/size
Field default value
Field description
Field mirror information
Brief register description
* Note: There maybe more than one address; the convention used is as follows:
[aperName:offset] - single mapping, to one aperture/decode and one offset
[aperName1, aperName2, ..., aperNameN:offset] - multiple mappings to different apertures/decodes but same
offset
[aperName:startOffset-endOffset] - mapped to an offset range in the same aperture/decode
Warning: Do not attempt to modify values of registers or bit fields marked "Reserved." Doing so may cause
the system to behave in unexpected manners.
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Value/Content in the Example
Latency Timer
RW
8 bits
Offset: 0Dh
Latency Timer (R/W)
7:0
00h
"This bit ... 8 clocks."
Latency Timer. Reset Value: 00h
Proprietary
Nomenclature and Conventions
Page 8