AMD SB600 Technical Reference Manual page 197

Address (hex)
Compatibility Mode
1F1 Base Address 0 + 1
1F2 Base Address 0 + 2
1F3 Base Address 0 + 3
1F4 Base Address 0 + 4
1F5 Base Address 0 + 5
1F6 Base Address 0 + 6
1F7 Base Address 0 + 7
IDE Control Block Registers
Primary
3F6 Base Address 1 + 2
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Native Mode (Offset)
Error register
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive/Head
Status
Alternate Status
Name and Function
Read Function
Features register
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive/Head
Command
Device Control
IDE Controller (Device 20, Function 1)
Proprietary
Write Function
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