AMD SB600 Technical Reference Manual page 149

Register reference manual
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Field Name
AcpiPm1CntBlkHi register.
Field Name
Reserved
AcpiPmTmrBlkLo
AcpiPmTmrBlkLo register.
Field Name
AcpiPmTmrBlkHi
AcpiPmTmrBlkHi register.
Field Name
Reserved
CpuControlLo
CpuControlLo register.
Field Name
CpuControlHi
CpuControlHi register.
Field Name
Reserved
AcpiGpe0BlkLo
AcpiGpe0BlkLo register.
Field Name
AcpiGpe0BlkHi
AcpiGpe0BlkHi register.
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
AcpiPm1CntBlkHi - RW – 8 bits - [PM_Reg: 23h]
Bits
Default
AcpiPmTmrBlkLo - RW – 8 bits - [PM_Reg: 24h]
Bits
Default
0
0b
7:1
00h
These bits define the least significant byte of the 16 bit I/O
base address of the ACPI power management Timer block.
Bit 1 corresponds to Addr[1] and bit 7 corresponds to Addr[7].
AcpiPmTmrBlkHi - RW – 8 bits - [PM_Reg: 25h]
Bits
Default
7:0
00h
These bits define the most significant byte of the 16 bit I/O
base address. Bit 0 corresponds to Addr[8] and bit 7
corresponds to Addr[15].
CpuControlLo - RW – 8 bits - [PM_Reg: 26h]
Bits
Default
2:0
000b
7:3
00h
These bits define the least significant byte of the 16 bit I/O
base address of the ACPI power management CPU Control
block. Bit 3 corresponds to Addr[3] and bit 7 corresponds to
Addr[7]. Addr[2:0] are ignored because this register block is 6
byte long.
CpuControlHi - RW – 8 bits - [PM_Reg: 27h]
Bits
Default
7:0
00h
These bits define the most significant byte of the 16 bit I/O
base address. Bit 0 corresponds to Addr[8] and bit 7
corresponds to Addr[15].
AcpiGpe0BlkLo - RW – 8 bits - [PM_Reg: 28h]
Bits
Default
1:0
00b
7:2
00h
These bits define the least significant byte of the 16 bit I/O
base address of the ACPI power management General
Purpose Event block. Bit 2 corresponds to Addr[2] and bit 7
corresponds to Addr[7]. Addr[1:0] are ignored because this
register block is 4 byte long.
AcpiGpe0BlkHi - RW – 8 bits - [PM_Reg: 29h]
Bits
Default
7:0
00h
These bits define the most significant byte of the 16 bit I/O
base address. Bit 0 corresponds to Addr[8] and bit 7
corresponds to Addr[15].
Description
Description
Description
Description
Description
Description
Description
SMBus Module and ACPI Block (Device 20, Function 0)
Proprietary
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