Gpm As Gpio; Gpm Pins As Input - AMD SB600 Technical Reference Manual

Pin Name Multi-Function
(*Note 1) Selection
EXTEVENT SMBus
1#/ Reg64h[Bit 22]
=1 to enable
LPC_SMI#
GPE
GPIO0 PM IO
Reg60h[Bit 7]=1
for GPIO; in
addition, PM IO
Reg84h[Bit 1]=0
and SMBus
Reg64h[Bit
19]=1 to enable
GPE
GPIO2 PM IO
Reg60h[Bit 5]=0
for GPIO
GPIO64/ PM2 IO
TALERT#/ Reg42h[Bit 7:6]
TEMPIN3
00: GPIO
01/10/11:
TEMPIN3
Notes:
1– In this table, the "GEVENT," "GPM," "EXTEVNT," or "GPIO" portion of the pin name has been put at the front of the names for the
sake of clarity, making the pin names different from how they appear in the
2–PM IO Register can be accessed through IO port CD6h/CD7h.
3–GPE Register is in the ACPI IO space. The base address of GPE IO space is defined in PM IO Reg28h/29h.
4–In K8 system, this pin is always used as S3_STATE output (indicating ACPI S3 state).
5–This pin is GEVENT pin only and not a multiplexed pin. The alternative function is mentioned only as a suggestion.
4.2.3

GPM as GPIO

GPM pins can be used as GPIO. The GPM I/O function is controlled by three registers: I/O C50h, C51h,
C52h, PM I/O 94h, 95h, 96h.
4.2.3.1

GPM Pins as Input

For GPM[7:0], follow this sequence -
1. Set index register 0C50h to 13h (Miscellaneous Control).
2. Set CM Data register 0C51h Bits [7:6] to 01b to set Input/Out control.
3. Set GPM port 0C52h appropriate bits to 1 to tri-state the GPM port.
4. Set CM Data register 0C51h Bits [7:6] = 00b to set GPM port for read.
5. Read the input status through port 0C52h.
For GPM[9:8], simply read the input status from PM I/O 96h Bits [1:0].
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Configure Bit Trigger Configure
00 – SCI or SMI# 0–Falling edge
01 – SMI# 1–Rising edge
10 – SMI#
followed by SCI
11 - IRQ13
PM IO PM IO
Reg32h[Bit3:2] Reg37h[Bit 1]
PM IO PM IO
Reg34h[Bit1:0] Reg38h[Bit 0]
PM IO PM IO
Reg35h[Bit5:4] Reg38h[Bit 6]
PM IO PM IO
Reg3Ch[Bit3:2] Reg67h[Bit 5]
SMI# followed by
SCI not available
Enable Status
ACPI Event (Write 1 to ACPI
GPE00h Bit to
Clear)
ACPI PM IO
GPE04h[Bit17] Reg3Ah[Bit 1]
or ACPI
GPE00h[Bit17]
ACPI PM IO
GPE04h[Bit24] Reg3Bh[Bit 0]
or ACPI
GPE00h[Bit24]
ACPI PM IO
GPE04h[Bit Reg3Bh[Bit 6]
30]
or ACPI
GPE00h[Bit 30]
ACPI ACPI
GPE04h[Bit 9]
GPE00h[Bit 9]
AMD SB600 Databook.
GEVENT/GPE/GPM/ExtEvent
Proprietary
Power
Domain
S0
S0
S0
S0
Page 286