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Field Name
Bits
PRS
Reserved
7:5
PPS
LSDA
Reserved
15:10
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
HcRhPortStatus - 32 bits - [MEM_Reg : 50h+4*(1:NDP)]
Default
HCD
4
0b
RW
8
0b
RW
9
X
RW
HC
RW
(Read) PortResetStatus
When this bit is set by a write to SetPortReset, port
reset signaling is asserted. When reset is completed,
this bit is cleared when PortResetStatusChange is
set. This bit cannot be set if CurrentConnectStatus
is cleared.
0 = Port reset signal is not active
1 = Port reset signal is active
(Write) SetPortReset
The HCD sets the port reset signaling by writing a '1'
to this bit. Writing a '0' has no effect. If
CurrentConnectStatus is cleared, this write does
not set PortResetStatus, but instead sets
ConnectStatusChange. This informs the driver that
it attempted to reset a disconnected port.
Reserved
RW
(Read) PortPowerStatus
This bit reflects the port's power status, regardless of
the type of power switching implemented. This bit is
cleared if an overcurrent condition is detected. HCD
sets this bit by writing SetPortPower or
SetGlobalPower. HCD clears this bit by writing
ClearPortPower or ClearGlobalPower. Which
power control switches are enabled is determined by
PowerSwitchingMode and
PortPortControlMask[NDP]. In global switching
mode, (PowerSwitchingMode=0), only
Set/ClearGlobalPower controls this bit. In per-port
power switching (PowerSwitchingMode=1), if the
PortPowerControlMask[NDP] bit for the port is set,
only Set/ClearPortPower commands are enabled. If
the mask is not set, only Set/ClearGlobalPower
commands are enabled. When port power is
disabled, CurrentConnectStatus,
PortEnableStatus, PortSuspendStatus, and
PortResetStatus should be reset.
0 = Port power is off
1 = Port power is on
(Write) SetPortPower
The HCD writes a '1' to set the PortPowerStatus bit.
Writing a '0' has no effect.
Note: This bit is always reads '1b' if power switching
is not supported.
RW
(Read) LowSpeedDeviceAttached
This bit indicates the speed of the device attached to
this port. When set, a Low Speed device is attached
to this port. When clear, a Full Speed device is
attached to this port. This field is valid only when the
CurrentConnectStatus is set.
0 = Full speed device attached
1 = Low speed device attached
(Write) ClearPortPower
The HCD clears the PortPowerStatus bit by writing a
'1' to this bit. Writing a '0' has no effect.
Reserved
OCHI USB 1.1 and EHCI USB 2.0 Controllers
Proprietary
Description
Page 65
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